Lines Matching full:fifo
39 #define XHI_WF_OFFSET 0x100 /* Write FIFO */
40 #define XHI_RF_OFFSET 0x104 /* Read FIFO */
44 #define XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */
45 #define XHI_RFO_OFFSET 0x118 /* Read FIFO Occupancy Register */
66 #define XHI_IPIXR_RFULL_MASK 0x00000008 /* Read FIFO Full */
67 #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */
68 #define XHI_IPIXR_RDP_MASK 0x00000002 /* Read FIFO half full */
69 #define XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */
74 #define XHI_CR_FIFO_CLR_MASK 0x00000004 /* FIFO Clear Mask */
75 #define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */
76 #define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */
79 #define XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */
80 #define XHI_RFO_MAX_OCCUPANCY 256 /* Max Read FIFO Occupancy, in words */
87 * fifo_icap_fifo_write - Write data to the write FIFO.
89 * @data: the 32-bit value to be written to the FIFO.
91 * This function will silently fail if the fifo is full.
101 * fifo_icap_fifo_read - Read data from the Read FIFO.
104 * This function will silently fail if the fifo is empty.
178 * fifo_icap_write_fifo_vacancy - Query the write fifo available space.
181 * Return the number of words that can be safely pushed into the write fifo.
190 * fifo_icap_read_fifo_occupancy - Query the read fifo available data.
193 * Return the number of words that can be safely read from the read fifo.
209 * This function writes the given user data to the Write FIFO in
236 * Wait until we have some data in the fifo. in fifo_icap_set_configuration()
247 * Write data into the Write FIFO. in fifo_icap_set_configuration()
257 /* Start pushing whatever is in the FIFO into the ICAP. */ in fifo_icap_set_configuration()
322 /* Wait until we have some data in the fifo. */ in fifo_icap_get_configuration()
336 /* Read the data from the Read FIFO. */ in fifo_icap_get_configuration()
354 * All the registers will return to the default value and the FIFO is also
382 * Flush the FIFO by setting/clearing the FIFO Clear bit in the in fifo_icap_flush_fifo()