drivers/atm/iphase.h

988 typedef struct iadev_priv {  struct
990 	u32 __iomem *phy;	/* Base pointer into phy (SUNI). */
991 	u32 __iomem *dma;	/* Base pointer into DMA control registers. */
992 	u32 __iomem *reg;	/* Base pointer to SAR registers. */
993 	u32 __iomem *seg_reg;		/* base pointer to segmentation engine
995 	u32 __iomem *reass_reg;		/* base pointer to reassemble engine
997 	u32 __iomem *ram;		/* base pointer to SAR RAM */
998 	void __iomem *seg_ram;
999 	void __iomem *reass_ram;
1000 	struct dle_q tx_dle_q;
1001 	struct free_desc_q *tx_free_desc_qhead;
1002 	struct sk_buff_head tx_dma_q, tx_backlog;
1003         spinlock_t            tx_lock;
1004         IARTN_Q               tx_return_q;
1005         u32                   close_pending;
1006         wait_queue_head_t    close_wait;
1007         wait_queue_head_t    timeout_wait;
1008 	struct cpcs_trailer_desc *tx_buf;
1009         u16 num_tx_desc, tx_buf_sz, rate_limit;
1010         u32 tx_cell_cnt, tx_pkt_cnt;
1011         void __iomem *MAIN_VC_TABLE_ADDR, *EXT_VC_TABLE_ADDR, *ABR_SCHED_TABLE_ADDR;
1012 	struct dle_q rx_dle_q;
1013 	struct free_desc_q *rx_free_desc_qhead;
1014 	struct sk_buff_head rx_dma_q;
1015 	spinlock_t rx_lock;
1016 	struct atm_vcc **rx_open;	/* list of all open VCs */
1017         u16 num_rx_desc, rx_buf_sz, rxing;
1018         u32 rx_pkt_ram, rx_tmp_cnt;
1019         unsigned long rx_tmp_jif;
1020         void __iomem *RX_DESC_BASE_ADDR;
1021         u32 drop_rxpkt, drop_rxcell, rx_cell_cnt, rx_pkt_cnt;
1022 	struct atm_dev *next_board;	/* other iphase devices */
1023 	struct pci_dev *pci;
1024 	int mem;
1025 	unsigned int real_base;	/* real and virtual base address */
1026 	void __iomem *base;
1027 	unsigned int pci_map_size;	/*pci map size of board */
1028 	unsigned char irq;
1029 	unsigned char bus;
1030 	unsigned char dev_fn;
1031         u_short  phy_type;
1032         u_short  num_vc, memSize, memType;
1033         struct ia_ffL_t ffL;
1034         struct ia_rfL_t rfL;
1037         unsigned char carrier_detect;
1040         unsigned int tx_dma_cnt;     // number of elements on dma queue
1041         unsigned int rx_dma_cnt;     // number of elements on rx dma queue
1042         unsigned int NumEnabledCBR;  // number of CBR VCI's enabled.     CBR
1044         unsigned int rx_mark_cnt;    // number of elements on mark queue
1045         unsigned int CbrTotEntries;  // Total CBR Entries in Scheduling Table.
1046         unsigned int CbrRemEntries;  // Remaining CBR Entries in Scheduling Table.
1047         unsigned int CbrEntryPt;     // CBR Sched Table Entry Point.
1048         unsigned int Granularity;    // CBR Granularity given Table Size.
1050 	unsigned int  sum_mcr, sum_cbr, LineRate;
1051 	unsigned int  n_abr;
1052         struct desc_tbl_t *desc_tbl;
1053         u_short host_tcq_wr;
1054         struct testTable_t **testTable;
1055 	dma_addr_t tx_dle_dma;
1056 	dma_addr_t rx_dle_dma;