include/asm/watchdog.h

2  * include/asm-sh/watchdog.h
30  * See cpu-sh2/watchdog.h for explanation of this stupidity..
41  * CKS0-2 supports a number of clock division ratios. At the time the watchdog
42  * is enabled, it defaults to a 41 usec overflow period .. we overload this to
47  * --------------------------------------------
68  * 	sh_wdt_read_cnt - Read from Counter
77  *	sh_wdt_write_cnt - Write to Counter
78  *	@val: Value to write
80  *	Writes the given value @val to the lower byte of the timer counter.
81  *	The upper byte is set manually on each write.
89  *	sh_wdt_write_bst - Write to Counter
90  *	@val: Value to write
92  *	Writes the given value @val to the lower byte of the timer counter.
93  *	The upper byte is set manually on each write.
100  * 	sh_wdt_read_csr - Read from Control/Status Register
110  * 	sh_wdt_write_csr - Write to Control/Status Register
111  * 	@val: Value to write
113  * 	Writes the given value @val to the lower byte of the control/status
114  * 	register. The upper byte is set manually on each write.
122  * 	sh_wdt_read_cnt - Read from Counter
131  *	sh_wdt_write_cnt - Write to Counter
132  *	@val: Value to write
134  *	Writes the given value @val to the lower byte of the timer counter.
135  *	The upper byte is set manually on each write.
143  * 	sh_wdt_read_csr - Read from Control/Status Register
153  * 	sh_wdt_write_csr - Write to Control/Status Register
154  * 	@val: Value to write
156  * 	Writes the given value @val to the lower byte of the control/status
157  * 	register. The upper byte is set manually on each write.