Lines Matching +full:0 +full:- +full:9 +full:a +full:- +full:f
2 * Signal trampoline for 64 bits processes in a ppc64 kernel for
21 /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from
23 call instruction. Since we don't have a call here, we artificially
29 .Lsigrt_start = . - 4
37 chosen in such a way that older libgcc unwind code returns a zero
38 for a sigcontext pointer. */
39 .long 0,0,0
40 .quad 0,-21*8
42 /* Register r1 can be found at offset 8 of a pt_regs structure.
43 A pointer to the pt_regs is stored in memory at the old sp plus PTREGS. */
45 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
46 .uleb128 9f - 1f; /* length */ \
48 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
49 .byte 0x06; /* DW_OP_deref */ \
50 .byte 0x23; .uleb128 RSIZE; /* DW_OP_plus_uconst */ \
51 .byte 0x06; /* DW_OP_deref */ \
52 9:
54 /* Register REGNO can be found at offset OFS of a pt_regs structure.
55 A pointer to the pt_regs is stored in memory at the old sp plus PTREGS. */
57 .byte 0x10; /* DW_CFA_expression */ \
59 .uleb128 9f - 1f; /* length */ \
61 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
62 .byte 0x06; /* DW_OP_deref */ \
64 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
66 9:
69 of the VMX reg struct. A pointer to the VMX reg struct is at VREGS in
70 the pt_regs struct. This macro is for REGNO == 0, and contains
73 .byte 0x10; /* DW_CFA_expression */ \
75 .uleb128 9f - 1f; /* length */ \
77 .byte 0x30 + regno; /* DW_OP_lit0 */ \
79 .byte 0x40; /* DW_OP_lit16 */ \
80 .byte 0x1e; /* DW_OP_mul */ \
82 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
83 .byte 0x06; /* DW_OP_deref */ \
84 .byte 0x12; /* DW_OP_dup */ \
85 .byte 0x23; /* DW_OP_plus_uconst */ \
87 .byte 0x06; /* DW_OP_deref */ \
88 .byte 0x0c; .long 1 << 25; /* DW_OP_const4u */ \
89 .byte 0x1a; /* DW_OP_and */ \
90 .byte 0x12; /* DW_OP_dup, ret 0 if bra taken */ \
91 .byte 0x30; /* DW_OP_lit0 */ \
92 .byte 0x29; /* DW_OP_eq */ \
93 .byte 0x28; .short 0x7fff; /* DW_OP_bra to end */ \
94 .byte 0x13; /* DW_OP_drop, pop the 0 */ \
95 .byte 0x23; .uleb128 VREGS; /* DW_OP_plus_uconst */ \
96 .byte 0x06; /* DW_OP_deref */ \
97 .byte 0x22; /* DW_OP_plus */ \
98 .byte 0x2f; .short 0x7fff; /* DW_OP_skip to end */ \
99 9:
104 .byte 0x10; /* DW_CFA_expression */ \
106 .uleb128 9f - 1f; /* length */ \
108 .byte 0x30 + regno; /* DW_OP_lit n */ \
109 .byte 0x2f; .short 2b - 9f; /* DW_OP_skip */ \
110 9:
115 .byte 0x10; /* DW_CFA_expression */ \
117 .uleb128 9f - 1f; /* length */ \
119 .byte 0x0a; .short ofs; /* DW_OP_const2u */ \
120 .byte 0x2f; .short 3b - 9f; /* DW_OP_skip */ \
121 9:
125 .byte 0x10; /* DW_CFA_expression */ \
127 .uleb128 9f - 1f; /* length */ \
129 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
130 .byte 0x06; /* DW_OP_deref */ \
131 .byte 0x23; .uleb128 VREGS; /* DW_OP_plus_uconst */ \
132 .byte 0x06; /* DW_OP_deref */ \
133 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
134 9:
151 rsave ( 0, 0*RSIZE); \
159 rsave ( 9, 9*RSIZE); \
184 rsave (70, 38*RSIZE + (RSIZE - CRSIZE)) /* cr */
188 rsave (32, 48*RSIZE + 0*8); \
197 rsave (41, 48*RSIZE + 9*8); \
224 vsave_msr0 ( 0); \
233 vsave_msr1 ( 9); \
262 .section .eh_frame,"a",@progbits
264 .long .Lcie_end - .Lcie_start
266 .long 0 /* CIE ID */
268 .string "zRS" /* NUL-terminated augmentation string */
270 .sleb128 -8 /* Data alignment factor */
273 .byte 0x14 /* DW_EH_PE_pcrel | DW_EH_PE_udata8. */
274 .byte 0x0c,1,0 /* DW_CFA_def_cfa: r1 ofs 0 */
278 .long .Lfde0_end - .Lfde0_start
280 .long .Lfde0_start - .Lcie /* CIE pointer. */
281 .quad .Lsigrt_start - . /* PC start, length */
282 .quad .Lsigrt_end - .Lsigrt_start
283 .uleb128 0 /* Augmentation */
290 # .byte 0x41 /* DW_CFA_advance_loc 1*4 */