powerpc/kernel/sys_ppc32.c

13  *      as published by the Free Software Foundation; either version
51 #include <asm/ppc-pci.h>
64  * with the corresponding cast to a signed int to insure that the
65 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
66  * and the register representation of a signed int (msr in 64-bit mode) is performed.
133 		return -ENOSYS;  in compat_sys_ipc()
136 	return -ENOSYS;  in compat_sys_ipc()
141  * with the corresponding cast to a signed int to insure that the
142 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
143  * and the register representation of a signed int (msr in 64-bit mode) is performed.
153 		return -EFAULT;  in compat_sys_sendfile()
162 		return -EFAULT;  in compat_sys_sendfile()
175 		return -EFAULT;  in compat_sys_sendfile64()
184 		return -EFAULT;  in compat_sys_sendfile64()
212  * with the corresponding cast to a signed int to insure that the
213 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
214  * and the register representation of a signed int (msr in 64-bit mode) is performed.
226  * with the corresponding cast to a signed int to insure that the
227 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
228  * and the register representation of a signed int (msr in 64-bit mode) is performed.
241 		return -EFAULT;  in compat_sys_sched_rr_get_interval()
246  * with the corresponding cast to a signed int to insure that the
247 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
248  * and the register representation of a signed int (msr in 64-bit mode) is performed.
257  * with the corresponding cast to a signed int to insure that the
258 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
259  * and the register representation of a signed int (msr in 64-bit mode) is performed.
268  * with the corresponding cast to a signed int to insure that the
269 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
270  * and the register representation of a signed int (msr in 64-bit mode) is performed.
279  * with the corresponding cast to a signed int to insure that the
280 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
281  * and the register representation of a signed int (msr in 64-bit mode) is performed.
290  * with the corresponding cast to a signed int to insure that the
291 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
292  * and the register representation of a signed int (msr in 64-bit mode) is performed.
302  * with the corresponding cast to a signed int to insure that the
303 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
304  * and the register representation of a signed int (msr in 64-bit mode) is performed.
313  * with the corresponding cast to a signed int to insure that the
314 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
315  * and the register representation of a signed int (msr in 64-bit mode) is performed.
324  * with the corresponding cast to a signed int to insure that the
325 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
326  * and the register representation of a signed int (msr in 64-bit mode) is performed.
358  * with the corresponding cast to a signed int to insure that the
359 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
360  * and the register representation of a signed int (msr in 64-bit mode) is performed.
368  * with the corresponding cast to a signed int to insure that the
369 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
370  * and the register representation of a signed int (msr in 64-bit mode) is performed.
379  * with the corresponding cast to a signed int to insure that the
380 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
381  * and the register representation of a signed int (msr in 64-bit mode) is performed.
390  * with the corresponding cast to a signed int to insure that the
391 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
392  * and the register representation of a signed int (msr in 64-bit mode) is performed.
401  * with the corresponding cast to a signed int to insure that the
402 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
403  * and the register representation of a signed int (msr in 64-bit mode) is performed.
412  * with the corresponding cast to a signed int to insure that the
413 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
414  * and the register representation of a signed int (msr in 64-bit mode) is performed.
423  * with the corresponding cast to a signed int to insure that the
424 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
425  * and the register representation of a signed int (msr in 64-bit mode) is performed.
434  * with the corresponding cast to a signed int to insure that the
435 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
436  * and the register representation of a signed int (msr in 64-bit mode) is performed.
445  * with the corresponding cast to a signed int to insure that the
446 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
447  * and the register representation of a signed int (msr in 64-bit mode) is performed.
463  * with the corresponding cast to a signed int to insure that the
464 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
465  * and the register representation of a signed int (msr in 64-bit mode) is performed.
497  * with the corresponding cast to a signed int to insure that the
498 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
499  * and the register representation of a signed int (msr in 64-bit mode) is performed.
514  * with the corresponding cast to a signed int to insure that the
515 …onversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
516  * and the register representation of a signed int (msr in 64-bit mode) is performed.