Lines Matching defs:si1
159 struct si1 { struct
160 __be16 siamr1; /* SI1 TDMA mode register */
161 __be16 sibmr1; /* SI1 TDMB mode register */
162 __be16 sicmr1; /* SI1 TDMC mode register */
163 __be16 sidmr1; /* SI1 TDMD mode register */
164 u8 siglmr1_h; /* SI1 global mode register high */
165 u8 res0[0x1];
166 u8 sicmdr1_h; /* SI1 command register high */
167 u8 res2[0x1];
168 u8 sistr1_h; /* SI1 status register high */
169 u8 res3[0x1];
170 __be16 sirsr1_h; /* SI1 RAM shadow address register high */
171 u8 sitarc1; /* SI1 RAM counter Tx TDMA */
172 u8 sitbrc1; /* SI1 RAM counter Tx TDMB */
173 u8 sitcrc1; /* SI1 RAM counter Tx TDMC */
174 u8 sitdrc1; /* SI1 RAM counter Tx TDMD */
175 u8 sirarc1; /* SI1 RAM counter Rx TDMA */
176 u8 sirbrc1; /* SI1 RAM counter Rx TDMB */
177 u8 sircrc1; /* SI1 RAM counter Rx TDMC */
178 u8 sirdrc1; /* SI1 RAM counter Rx TDMD */
179 u8 res4[0x8];
180 __be16 siemr1; /* SI1 TDME mode register 16 bits */
181 __be16 sifmr1; /* SI1 TDMF mode register 16 bits */
182 __be16 sigmr1; /* SI1 TDMG mode register 16 bits */
183 __be16 sihmr1; /* SI1 TDMH mode register 16 bits */
184 u8 siglmg1_l; /* SI1 global mode register low 8 bits */
185 u8 res5[0x1];
186 u8 sicmdr1_l; /* SI1 command register low 8 bits */
187 u8 res6[0x1];
188 u8 sistr1_l; /* SI1 status register low 8 bits */
189 u8 res7[0x1];
190 __be16 sirsr1_l; /* SI1 RAM shadow address register low 16 bits*/
191 u8 siterc1; /* SI1 RAM counter Tx TDME 8 bits */
192 u8 sitfrc1; /* SI1 RAM counter Tx TDMF 8 bits */
193 u8 sitgrc1; /* SI1 RAM counter Tx TDMG 8 bits */
194 u8 sithrc1; /* SI1 RAM counter Tx TDMH 8 bits */
195 u8 sirerc1; /* SI1 RAM counter Rx TDME 8 bits */
196 u8 sirfrc1; /* SI1 RAM counter Rx TDMF 8 bits */
197 u8 sirgrc1; /* SI1 RAM counter Rx TDMG 8 bits */
198 u8 sirhrc1; /* SI1 RAM counter Rx TDMH 8 bits */
199 u8 res8[0x8];
200 __be32 siml1; /* SI1 multiframe limit register */
201 u8 siedm1; /* SI1 extended diagnostic mode register */
202 u8 res9[0xBB];
437 struct si1 si1; /* SI */ member