Lines Matching +full:interrupt +full:- +full:parent
13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
42 bus-frequency = <0>;
43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
54 #address-cells = <1>;
55 #size-cells = <1>;
58 bus-frequency = <0>;
59 compatible = "fsl,mpc8560-immr", "simple-bus";
61 ecm-law@0 {
62 compatible = "fsl,ecm-law";
64 fsl,num-laws = <8>;
68 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
71 interrupt-parent = <&mpic>;
74 memory-controller@2000 {
75 compatible = "fsl,mpc8540-memory-controller";
77 interrupt-parent = <&mpic>;
81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8540-l2-cache-controller";
84 cache-line-size = <32>;
85 cache-size = <0x40000>; // L2, 256K
86 interrupt-parent = <&mpic>;
91 #address-cells = <1>;
92 #size-cells = <0>;
93 cell-index = <0>;
94 compatible = "fsl-i2c";
97 interrupt-parent = <&mpic>;
112 #address-cells = <1>;
113 #size-cells = <1>;
114 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
117 cell-index = <0>;
118 dma-channel@0 {
119 compatible = "fsl,mpc8560-dma-channel",
120 "fsl,eloplus-dma-channel";
122 cell-index = <0>;
123 interrupt-parent = <&mpic>;
126 dma-channel@80 {
127 compatible = "fsl,mpc8560-dma-channel",
128 "fsl,eloplus-dma-channel";
130 cell-index = <1>;
131 interrupt-parent = <&mpic>;
134 dma-channel@100 {
135 compatible = "fsl,mpc8560-dma-channel",
136 "fsl,eloplus-dma-channel";
138 cell-index = <2>;
139 interrupt-parent = <&mpic>;
142 dma-channel@180 {
143 compatible = "fsl,mpc8560-dma-channel",
144 "fsl,eloplus-dma-channel";
146 cell-index = <3>;
147 interrupt-parent = <&mpic>;
153 #address-cells = <1>;
154 #size-cells = <1>;
155 cell-index = <0>;
161 local-mac-address = [ 00 00 00 00 00 00 ];
163 interrupt-parent = <&mpic>;
164 tbi-handle = <&tbi0>;
165 phy-handle = <&phy2>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 compatible = "fsl,gianfar-mdio";
173 phy1: ethernet-phy@1 {
174 interrupt-parent = <&mpic>;
177 device_type = "ethernet-phy";
179 phy2: ethernet-phy@2 {
180 interrupt-parent = <&mpic>;
183 device_type = "ethernet-phy";
185 phy3: ethernet-phy@3 {
186 interrupt-parent = <&mpic>;
189 device_type = "ethernet-phy";
191 tbi0: tbi-phy@11 {
193 device_type = "tbi-phy";
199 #address-cells = <1>;
200 #size-cells = <1>;
201 cell-index = <1>;
207 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupt-parent = <&mpic>;
210 tbi-handle = <&tbi1>;
211 phy-handle = <&phy1>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "fsl,gianfar-tbi";
219 tbi1: tbi-phy@11 {
221 device_type = "tbi-phy";
227 interrupt-controller;
228 #address-cells = <0>;
229 #interrupt-cells = <2>;
231 device_type = "open-pic";
232 compatible = "chrp,open-pic";
236 #address-cells = <1>;
237 #size-cells = <1>;
238 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
243 #address-cells = <1>;
244 #size-cells = <1>;
248 compatible = "fsl,cpm-muram-data";
254 compatible = "fsl,mpc8560-brg",
255 "fsl,cpm2-brg",
256 "fsl,cpm-brg";
258 clock-frequency = <0>;
262 interrupt-controller;
263 #address-cells = <0>;
264 #interrupt-cells = <2>;
266 interrupt-parent = <&mpic>;
268 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
273 compatible = "fsl,mpc8560-scc-uart",
274 "fsl,cpm2-scc-uart";
276 fsl,cpm-brg = <1>;
277 fsl,cpm-command = <0x800000>;
278 current-speed = <115200>;
280 interrupt-parent = <&cpmpic>;
285 compatible = "fsl,mpc8560-scc-uart",
286 "fsl,cpm2-scc-uart";
288 fsl,cpm-brg = <2>;
289 fsl,cpm-command = <0x4a00000>;
290 current-speed = <115200>;
292 interrupt-parent = <&cpmpic>;
297 compatible = "fsl,mpc8560-fcc-enet",
298 "fsl,cpm2-fcc-enet";
300 local-mac-address = [ 00 00 00 00 00 00 ];
301 fsl,cpm-command = <0x1a400300>;
303 interrupt-parent = <&cpmpic>;
304 phy-handle = <&phy3>;
310 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
311 "simple-bus";
312 #address-cells = <2>;
313 #size-cells = <1>;
315 interrupt-parent = <&mpic>;
325 #address-cells = <1>;
326 #size-cells = <1>;
327 compatible = "cfi-flash";
329 bank-width = <4>;
330 device-width = <1>;
353 label = "u-boot";
355 read-only;
359 /* Note: CAN support needs be enabled in U-Boot */
364 interrupt-parent = <&mpic>;
371 interrupt-parent = <&mpic>;
376 #interrupt-cells = <1>;
377 #size-cells = <2>;
378 #address-cells = <3>;
379 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
382 clock-frequency = <66666666>;
383 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
384 interrupt-map = <
396 interrupt-parent = <&mpic>;
398 bus-range = <0 0>;