Lines Matching +full:0 +full:x2000

30 		#size-cells = <0>;
32 PowerPC,8541@0 {
34 reg = <0>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
48 reg = <0x00000000 0x10000000>;
55 ranges = <0x0 0xe0000000 0x100000>;
56 bus-frequency = <0>;
59 ecm-law@0 {
61 reg = <0x0 0x1000>;
67 reg = <0x1000 0x1000>;
74 reg = <0x2000 0x1000>;
81 reg = <0x20000 0x1000>;
83 cache-size = <0x40000>; // L2, 256K
90 #size-cells = <0>;
91 cell-index = <0>;
93 reg = <0x3000 0x100>;
100 reg = <0x48>;
105 reg = <0x68>;
113 reg = <0x21300 0x4>;
114 ranges = <0x0 0x21100 0x200>;
115 cell-index = <0>;
116 dma-channel@0 {
119 reg = <0x0 0x80>;
120 cell-index = <0>;
127 reg = <0x80 0x80>;
135 reg = <0x100 0x80>;
143 reg = <0x180 0x80>;
153 cell-index = <0>;
157 reg = <0x24000 0x1000>;
158 ranges = <0x0 0x24000 0x1000>;
167 #size-cells = <0>;
169 reg = <0x520 0x20>;
190 reg = <0x11>;
203 reg = <0x25000 0x1000>;
204 ranges = <0x0 0x25000 0x1000>;
213 #size-cells = <0>;
215 reg = <0x520 0x20>;
218 reg = <0x11>;
225 cell-index = <0>;
228 reg = <0x4500 0x100>; // reg base, size
229 clock-frequency = <0>; // should we fill in in uboot?
238 reg = <0x4600 0x100>; // reg base, size
239 clock-frequency = <0>; // should we fill in in uboot?
245 compatible = "fsl,sec2.0";
246 reg = <0x30000 0x10000>;
251 fsl,exec-units-mask = <0x7e>;
252 fsl,descriptor-types-mask = <0x01010ebf>;
257 #address-cells = <0>;
259 reg = <0x40000 0x40000>;
268 reg = <0x919c0 0x30>;
274 ranges = <0 0x80000 0x10000>;
276 data@0 {
278 reg = <0 0x2000 0x9000 0x1000>;
286 reg = <0x919f0 0x10 0x915f0 0x10>;
287 clock-frequency = <0>;
292 #address-cells = <0>;
296 reg = <0x90c00 0x80>;
308 reg = <0xe0008000 0x1000>;
310 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
313 0xe000 0 0 1 &mpic 2 1
314 0xe000 0 0 2 &mpic 3 1
315 0xe000 0 0 3 &mpic 6 1
316 0xe000 0 0 4 &mpic 5 1
319 0x5800 0 0 1 &mpic 6 1
320 0x5800 0 0 2 &mpic 5 1
325 bus-range = <0 0>;
326 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
327 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;