Lines Matching +full:interrupt +full:- +full:parent

12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
53 #address-cells = <1>;
54 #size-cells = <1>;
57 bus-frequency = <0>;
58 compatible = "fsl,mpc8540-immr", "simple-bus";
60 ecm-law@0 {
61 compatible = "fsl,ecm-law";
63 fsl,num-laws = <8>;
67 compatible = "fsl,mpc8540-ecm", "fsl,ecm";
70 interrupt-parent = <&mpic>;
73 memory-controller@2000 {
74 compatible = "fsl,mpc8540-memory-controller";
76 interrupt-parent = <&mpic>;
80 L2: l2-cache-controller@20000 {
81 compatible = "fsl,mpc8540-l2-cache-controller";
83 cache-line-size = <32>;
84 cache-size = <0x40000>; // L2, 256K
85 interrupt-parent = <&mpic>;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 cell-index = <0>;
93 compatible = "fsl-i2c";
96 interrupt-parent = <&mpic>;
111 #address-cells = <1>;
112 #size-cells = <1>;
113 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
116 cell-index = <0>;
117 dma-channel@0 {
118 compatible = "fsl,mpc8540-dma-channel",
119 "fsl,eloplus-dma-channel";
121 cell-index = <0>;
122 interrupt-parent = <&mpic>;
125 dma-channel@80 {
126 compatible = "fsl,mpc8540-dma-channel",
127 "fsl,eloplus-dma-channel";
129 cell-index = <1>;
130 interrupt-parent = <&mpic>;
133 dma-channel@100 {
134 compatible = "fsl,mpc8540-dma-channel",
135 "fsl,eloplus-dma-channel";
137 cell-index = <2>;
138 interrupt-parent = <&mpic>;
141 dma-channel@180 {
142 compatible = "fsl,mpc8540-dma-channel",
143 "fsl,eloplus-dma-channel";
145 cell-index = <3>;
146 interrupt-parent = <&mpic>;
152 #address-cells = <1>;
153 #size-cells = <1>;
154 cell-index = <0>;
160 local-mac-address = [ 00 00 00 00 00 00 ];
162 interrupt-parent = <&mpic>;
163 phy-handle = <&phy2>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 compatible = "fsl,gianfar-mdio";
171 phy1: ethernet-phy@1 {
172 interrupt-parent = <&mpic>;
175 device_type = "ethernet-phy";
177 phy2: ethernet-phy@2 {
178 interrupt-parent = <&mpic>;
181 device_type = "ethernet-phy";
183 phy3: ethernet-phy@3 {
184 interrupt-parent = <&mpic>;
187 device_type = "ethernet-phy";
189 tbi0: tbi-phy@11 {
191 device_type = "tbi-phy";
197 #address-cells = <1>;
198 #size-cells = <1>;
199 cell-index = <1>;
205 local-mac-address = [ 00 00 00 00 00 00 ];
207 interrupt-parent = <&mpic>;
208 phy-handle = <&phy1>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 compatible = "fsl,gianfar-tbi";
216 tbi1: tbi-phy@11 {
218 device_type = "tbi-phy";
224 #address-cells = <1>;
225 #size-cells = <1>;
226 cell-index = <2>;
232 local-mac-address = [ 00 00 00 00 00 00 ];
234 interrupt-parent = <&mpic>;
235 phy-handle = <&phy3>;
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "fsl,gianfar-tbi";
243 tbi2: tbi-phy@11 {
245 device_type = "tbi-phy";
251 cell-index = <0>;
255 clock-frequency = <0>; // should we fill in in uboot?
257 interrupt-parent = <&mpic>;
261 cell-index = <1>;
265 clock-frequency = <0>; // should we fill in in uboot?
267 interrupt-parent = <&mpic>;
271 interrupt-controller;
272 #address-cells = <0>;
273 #interrupt-cells = <2>;
275 device_type = "open-pic";
276 compatible = "chrp,open-pic";
281 #address-cells = <2>;
282 #size-cells = <1>;
283 compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus",
284 "simple-bus";
286 interrupt-parent = <&mpic>;
292 #address-cells = <1>;
293 #size-cells = <1>;
294 compatible = "cfi-flash";
296 bank-width = <4>;
297 device-width = <2>;
315 label = "u-boot";
317 read-only;
323 #interrupt-cells = <1>;
324 #size-cells = <2>;
325 #address-cells = <3>;
326 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
329 clock-frequency = <66666666>;
330 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
331 interrupt-map = <
343 interrupt-parent = <&mpic>;
345 bus-range = <0 0>;