Lines Matching +full:interrupt +full:- +full:parent
14 /dts-v1/;
19 #address-cells = <1>;
20 #size-cells = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
39 d-cache-line-size = <0x20>; // 32 bytes
40 i-cache-line-size = <0x20>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
56 #address-cells = <1>;
57 #size-cells = <1>;
60 clock-frequency = <0>;
62 ecm-law@0 {
63 compatible = "fsl,ecm-law";
65 fsl,num-laws = <8>;
69 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
72 interrupt-parent = <&mpic>;
75 memory-controller@2000 {
76 compatible = "fsl,mpc8560-memory-controller";
78 interrupt-parent = <&mpic>;
82 L2: l2-cache-controller@20000 {
83 compatible = "fsl,mpc8560-l2-cache-controller";
85 cache-line-size = <0x20>; // 32 bytes
86 cache-size = <0x40000>; // L2, 256K
87 interrupt-parent = <&mpic>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 cell-index = <0>;
95 compatible = "fsl-i2c";
98 interrupt-parent = <&mpic>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 cell-index = <1>;
106 compatible = "fsl-i2c";
109 interrupt-parent = <&mpic>;
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
119 cell-index = <0>;
120 dma-channel@0 {
121 compatible = "fsl,mpc8560-dma-channel",
122 "fsl,eloplus-dma-channel";
124 cell-index = <0>;
125 interrupt-parent = <&mpic>;
128 dma-channel@80 {
129 compatible = "fsl,mpc8560-dma-channel",
130 "fsl,eloplus-dma-channel";
132 cell-index = <1>;
133 interrupt-parent = <&mpic>;
136 dma-channel@100 {
137 compatible = "fsl,mpc8560-dma-channel",
138 "fsl,eloplus-dma-channel";
140 cell-index = <2>;
141 interrupt-parent = <&mpic>;
144 dma-channel@180 {
145 compatible = "fsl,mpc8560-dma-channel",
146 "fsl,eloplus-dma-channel";
148 cell-index = <3>;
149 interrupt-parent = <&mpic>;
155 #address-cells = <1>;
156 #size-cells = <1>;
157 cell-index = <0>;
163 local-mac-address = [ 00 00 00 00 00 00 ];
165 interrupt-parent = <&mpic>;
166 tbi-handle = <&tbi0>;
167 phy-handle = <&phy0>;
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl,gianfar-mdio";
174 phy0: ethernet-phy@19 {
175 interrupt-parent = <&mpic>;
178 device_type = "ethernet-phy";
180 phy1: ethernet-phy@1a {
181 interrupt-parent = <&mpic>;
184 device_type = "ethernet-phy";
186 phy2: ethernet-phy@1b {
187 interrupt-parent = <&mpic>;
190 device_type = "ethernet-phy";
192 phy3: ethernet-phy@1c {
193 interrupt-parent = <&mpic>;
196 device_type = "ethernet-phy";
198 tbi0: tbi-phy@11 {
200 device_type = "tbi-phy";
206 #address-cells = <1>;
207 #size-cells = <1>;
208 cell-index = <1>;
214 local-mac-address = [ 00 00 00 00 00 00 ];
216 interrupt-parent = <&mpic>;
217 tbi-handle = <&tbi1>;
218 phy-handle = <&phy1>;
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,gianfar-tbi";
226 tbi1: tbi-phy@11 {
228 device_type = "tbi-phy";
234 interrupt-controller;
235 #address-cells = <0>;
236 #interrupt-cells = <2>;
237 compatible = "chrp,open-pic";
239 device_type = "open-pic";
243 #address-cells = <1>;
244 #size-cells = <1>;
245 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
250 #address-cells = <1>;
251 #size-cells = <1>;
255 compatible = "fsl,cpm-muram-data";
261 compatible = "fsl,mpc8560-brg",
262 "fsl,cpm2-brg",
263 "fsl,cpm-brg";
265 clock-frequency = <165000000>;
269 interrupt-controller;
270 #address-cells = <0>;
271 #interrupt-cells = <2>;
273 interrupt-parent = <&mpic>;
275 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
280 compatible = "fsl,mpc8560-fcc-enet",
281 "fsl,cpm2-fcc-enet";
283 local-mac-address = [ 00 00 00 00 00 00 ];
284 fsl,cpm-command = <0x16200300>;
286 interrupt-parent = <&cpmpic>;
287 phy-handle = <&phy2>;
292 compatible = "fsl,mpc8560-fcc-enet",
293 "fsl,cpm2-fcc-enet";
295 local-mac-address = [ 00 00 00 00 00 00 ];
296 fsl,cpm-command = <0x1a400300>;
298 interrupt-parent = <&cpmpic>;
299 phy-handle = <&phy3>;
303 global-utilities@e0000 {
304 compatible = "fsl,mpc8560-guts";
310 #interrupt-cells = <1>;
311 #size-cells = <2>;
312 #address-cells = <3>;
313 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
316 clock-frequency = <66666666>;
317 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
318 interrupt-map = <
326 interrupt-parent = <&mpic>;
328 bus-range = <0x0 0x0>;
334 compatible = "fsl,mpc8560-localbus", "simple-bus";
335 #address-cells = <2>;
336 #size-cells = <1>;
350 compatible = "wrs,epld-localbus";
351 #address-cells = <2>;
352 #size-cells = <1>;
368 compatible = "wrs,sbc8560-bidr";
373 compatible = "wrs,sbc8560-bcsr";
378 compatible = "wrs,sbc8560-brstcr";
386 clock-frequency = <1843200>;
388 interrupt-parent = <&mpic>;
395 clock-frequency = <1843200>;
397 interrupt-parent = <&mpic>;