boot/dts/sbc8349.dts

8  *	-based largely on the Freescale MPC834x_MDS dts.
16 /dts-v1/;
21 	#address-cells = <1>;
22 	#size-cells = <1>;
33 		#address-cells = <1>;
34 		#size-cells = <0>;
39 			d-cache-line-size = <32>;
40 			i-cache-line-size = <32>;
41 			d-cache-size = <32768>;
42 			i-cache-size = <32768>;
43 			timebase-frequency = <0>;	// from bootloader
44 			bus-frequency = <0>;		// from bootloader
45 			clock-frequency = <0>;		// from bootloader
55 		#address-cells = <1>;
56 		#size-cells = <1>;
60 		bus-frequency = <0>;
68 			#address-cells = <1>;
69 			#size-cells = <0>;
70 			cell-index = <0>;
71 			compatible = "fsl-i2c";
74 			interrupt-parent = <&ipic>;
79 			#address-cells = <1>;
80 			#size-cells = <0>;
81 			cell-index = <1>;
82 			compatible = "fsl-i2c";
85 			interrupt-parent = <&ipic>;
90 			cell-index = <0>;
94 			interrupt-parent = <&ipic>;
99 			#address-cells = <1>;
100 			#size-cells = <1>;
101 			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
104 			interrupt-parent = <&ipic>;
106 			cell-index = <0>;
107 			dma-channel@0 {
108 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
110 				cell-index = <0>;
111 				interrupt-parent = <&ipic>;
114 			dma-channel@80 {
115 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117 				cell-index = <1>;
118 				interrupt-parent = <&ipic>;
121 			dma-channel@100 {
122 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 				cell-index = <2>;
125 				interrupt-parent = <&ipic>;
128 			dma-channel@180 {
129 				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
131 				cell-index = <3>;
132 				interrupt-parent = <&ipic>;
140 			compatible = "fsl-usb2-mph";
142 			#address-cells = <1>;
143 			#size-cells = <0>;
144 			interrupt-parent = <&ipic>;
151 			#address-cells = <1>;
152 			#size-cells = <1>;
153 			cell-index = <0>;
159 			local-mac-address = [ 00 00 00 00 00 00 ];
161 			interrupt-parent = <&ipic>;
162 			tbi-handle = <&tbi0>;
163 			phy-handle = <&phy0>;
164 			linux,network-index = <0>;
167 				#address-cells = <1>;
168 				#size-cells = <0>;
169 				compatible = "fsl,gianfar-mdio";
172 				phy0: ethernet-phy@19 {
173 					interrupt-parent = <&ipic>;
176 					device_type = "ethernet-phy";
179 				phy1: ethernet-phy@1a {
180 					interrupt-parent = <&ipic>;
183 					device_type = "ethernet-phy";
186 				tbi0: tbi-phy@11 {
188 					device_type = "tbi-phy";
194 			#address-cells = <1>;
195 			#size-cells = <1>;
196 			cell-index = <1>;
202 			local-mac-address = [ 00 00 00 00 00 00 ];
204 			interrupt-parent = <&ipic>;
205 			tbi-handle = <&tbi1>;
206 			phy-handle = <&phy1>;
207 			linux,network-index = <1>;
210 				#address-cells = <1>;
211 				#size-cells = <0>;
212 				compatible = "fsl,gianfar-tbi";
215 				tbi1: tbi-phy@11 {
217 					device_type = "tbi-phy";
223 			cell-index = <0>;
227 			clock-frequency = <0>;
229 			interrupt-parent = <&ipic>;
233 			cell-index = <1>;
237 			clock-frequency = <0>;
239 			interrupt-parent = <&ipic>;
246 			interrupt-parent = <&ipic>;
247 			fsl,num-channels = <4>;
248 			fsl,channel-fifo-len = <24>;
249 			fsl,exec-units-mask = <0x7e>;
250 			fsl,descriptor-types-mask = <0x01010ebf>;
257 		 * sense == 2: Edge, high-to-low change
260 			interrupt-controller;
261 			#address-cells = <0>;
262 			#interrupt-cells = <2>;
269 		#address-cells = <2>;
270 		#size-cells = <1>;
271 		compatible = "fsl,mpc8349-localbus", "simple-bus";
274 		interrupt-parent = <&ipic>;
281 			#address-cells = <1>;
282 			#size-cells = <1>;
283 			compatible = "intel,28F640J3A", "cfi-flash";
285 			bank-width = <2>;
286 			device-width = <1>;
289 				label = "u-boot";
291 				read-only;
300 				label = "legacy u-boot";
302 				read-only;
309 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
310 		interrupt-map = <
318 		interrupt-parent = <&ipic>;
320 		bus-range = <0 0>;
324 		clock-frequency = <66666666>;
325 		#interrupt-cells = <1>;
326 		#size-cells = <2>;
327 		#address-cells = <3>;
330 		compatible = "fsl,mpc8349-pci";