Lines Matching +full:reg +full:- +full:names
14 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 coherency-off;
24 #address-cells = <1>;
25 #size-cells = <0>;
29 reg = <0>;
30 clock-frequency = <733333333>; /* Default */
31 bus-frequency = <133333333>;
32 timebase-frequency = <33333333>;
33 i-cache-line-size = <32>;
34 d-cache-line-size = <32>;
35 i-cache-size = <32768>;
36 d-cache-size = <32768>;
42 reg = <0x0 0x20000000>; /* Default (512MB) */
45 system-controller@f1000000 { /* Marvell Discovery mv64360 */
46 #address-cells = <1>;
47 #size-cells = <1>;
50 clock-frequency = <133333333>;
51 reg = <0xf1000000 0x10000>;
52 virtual-reg = <0xf1000000>;
61 compatible = "direct-mapped";
62 reg = <0xa0000000 0x4000000>; /* Default (64MB) */
63 probe-type = "CFI";
64 bank-width = <4>;
70 partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
74 #address-cells = <1>;
75 #size-cells = <0>;
77 compatible = "marvell,mv64360-mdio";
78 PHY0: ethernet-phy@1 {
79 device_type = "ethernet-phy";
82 interrupt-parent = <&PIC>;
83 reg = <1>;
85 PHY1: ethernet-phy@3 {
86 device_type = "ethernet-phy";
89 interrupt-parent = <&PIC>;
90 reg = <3>;
94 ethernet-group@2000 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 compatible = "marvell,mv64360-eth-group";
98 reg = <0x2000 0x2000>;
101 compatible = "marvell,mv64360-eth";
102 reg = <0>;
104 interrupt-parent = <&PIC>;
106 local-mac-address = [ 00 00 00 00 00 00 ];
110 compatible = "marvell,mv64360-eth";
111 reg = <1>;
113 interrupt-parent = <&PIC>;
115 local-mac-address = [ 00 00 00 00 00 00 ];
120 compatible = "marvell,mv64360-sdma";
121 reg = <0x4000 0xc18>;
122 virtual-reg = <0xf1004000>;
124 interrupt-parent = <&PIC>;
128 compatible = "marvell,mv64360-sdma";
129 reg = <0x6000 0xc18>;
130 virtual-reg = <0xf1006000>;
132 interrupt-parent = <&PIC>;
136 compatible = "marvell,mv64360-brg";
137 reg = <0xb200 0x8>;
138 clock-src = <8>;
139 clock-frequency = <133333333>;
140 current-speed = <9600>;
144 compatible = "marvell,mv64360-brg";
145 reg = <0xb208 0x8>;
146 clock-src = <8>;
147 clock-frequency = <133333333>;
148 current-speed = <9600>;
152 reg = <0xf200 0x200>;
156 reg = <0xb400 0xc>;
160 reg = <0xb800 0x100>;
161 virtual-reg = <0xf100b800>;
166 compatible = "marvell,mv64360-mpsc";
167 reg = <0x8000 0x38>;
168 virtual-reg = <0xf1008000>;
174 cell-index = <0>;
176 interrupt-parent = <&PIC>;
181 compatible = "marvell,mv64360-mpsc";
182 reg = <0x9000 0x38>;
183 virtual-reg = <0xf1009000>;
189 cell-index = <1>;
191 interrupt-parent = <&PIC>;
195 compatible = "marvell,mv64360-wdt";
196 reg = <0xb410 0x8>;
201 compatible = "marvell,mv64360-i2c";
202 reg = <0xc000 0x20>;
203 virtual-reg = <0xf100c000>;
205 interrupt-parent = <&PIC>;
209 #interrupt-cells = <1>;
210 #address-cells = <0>;
211 compatible = "marvell,mv64360-pic";
212 reg = <0x0 0x88>;
213 interrupt-controller;
217 compatible = "marvell,mv64360-mpp";
218 reg = <0xf000 0x10>;
222 compatible = "marvell,mv64360-gpp";
223 reg = <0xf100 0x20>;
227 #address-cells = <3>;
228 #size-cells = <2>;
229 #interrupt-cells = <1>;
231 compatible = "marvell,mv64360-pci";
232 reg = <0xcf8 0x8>;
237 bus-range = <0 255>;
238 clock-frequency = <66000000>;
239 interrupt-pci-iack = <0xc34>;
240 interrupt-parent = <&PIC>;
241 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
242 interrupt-map = <
269 cpu-error@0070 {
270 compatible = "marvell,mv64360-cpu-error";
271 reg = <0x70 0x10 0x128 0x28>;
273 interrupt-parent = <&PIC>;
276 sram-ctrl@0380 {
277 compatible = "marvell,mv64360-sram-ctrl";
278 reg = <0x380 0x80>;
280 interrupt-parent = <&PIC>;
283 pci-error@1d40 {
284 compatible = "marvell,mv64360-pci-error";
285 reg = <0x1d40 0x40 0xc28 0x4>;
287 interrupt-parent = <&PIC>;
290 mem-ctrl@1400 {
291 compatible = "marvell,mv64360-mem-ctrl";
292 reg = <0x1400 0x60>;
294 interrupt-parent = <&PIC>;
300 linux,stdout-path = &MPSC0;