Lines Matching +full:msi +full:- +full:ranges
4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /include/ "fsl/p3041si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
57 #address-cells = <1>;
58 #size-cells = <1>;
61 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot {
63 label = "u-boot";
65 read-only;
70 read-only;
75 read-only;
108 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
111 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
117 ranges = <0 0 0xf 0xe8000000 0x08000000
122 compatible = "cfi-flash";
124 bank-width = <2>;
125 device-width = <2>;
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "fsl,elbc-fcm-nand";
135 label = "NAND U-Boot Image";
137 read-only;
166 board-control@3,0 {
167 compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
174 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
176 fsl,msi = <&msi0>;
178 ranges = <0x02000000 0 0xe0000000
190 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
192 fsl,msi = <&msi1>;
194 ranges = <0x02000000 0 0xe0000000
206 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
208 fsl,msi = <&msi2>;
210 ranges = <0x02000000 0 0xe0000000
222 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
224 fsl,msi = <&msi2>;
226 ranges = <0x02000000 0 0xe0000000
237 /include/ "fsl/p3041si-post.dtsi"