Lines Matching +full:msi +full:- +full:ranges
4 * Copyright 2007-2008 Freescale Semiconductor Inc.
11 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>; // L1
37 i-cache-size = <32768>; // L1
40 timebase-frequency = <0>; // From uboot
41 bus-frequency = <0>; // From uboot
42 clock-frequency = <0>; // From uboot
52 #address-cells = <2>;
53 #size-cells = <1>;
54 compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus";
57 interrupt-parent = <&mpic>;
58 ranges = <0 0 0xf8000000 0x08000000
68 compatible = "cfi-flash";
70 bank-width = <2>;
71 device-width = <1>;
75 compatible = "cfi-flash";
77 bank-width = <2>;
78 device-width = <1>;
82 compatible = "fsl,mpc8610-fcm-nand",
83 "fsl,elbc-fcm-nand";
88 compatible = "fsl,mpc8610-fcm-nand",
89 "fsl,elbc-fcm-nand";
94 compatible = "fsl,mpc8610-fcm-nand",
95 "fsl,elbc-fcm-nand";
100 compatible = "fsl,mpc8610-fcm-nand",
101 "fsl,elbc-fcm-nand";
105 board-control@3,0 {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "fsl,fpga-pixis";
110 ranges = <0 3 0 0x20>;
111 interrupt-parent = <&mpic>;
114 sdcsr_pio: gpio-controller@a {
115 #gpio-cells = <2>;
116 compatible = "fsl,fpga-pixis-gpio-bank";
118 gpio-controller;
124 #address-cells = <1>;
125 #size-cells = <1>;
126 #interrupt-cells = <2>;
128 compatible = "fsl,mpc8610-immr", "simple-bus";
129 ranges = <0x0 0xe0000000 0x00100000>;
130 bus-frequency = <0>;
132 mcm-law@0 {
133 compatible = "fsl,mcm-law";
135 fsl,num-laws = <10>;
139 compatible = "fsl,mpc8610-mcm", "fsl,mcm";
142 interrupt-parent = <&mpic>;
146 #address-cells = <1>;
147 #size-cells = <0>;
148 cell-index = <0>;
149 compatible = "fsl-i2c";
152 interrupt-parent = <&mpic>;
158 /* MCLK source is a stand-alone oscillator */
159 clock-frequency = <12288000>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166 cell-index = <1>;
167 compatible = "fsl-i2c";
170 interrupt-parent = <&mpic>;
176 cell-index = <0>;
180 clock-frequency = <0>;
182 interrupt-parent = <&mpic>;
187 cell-index = <1>;
191 clock-frequency = <0>;
193 interrupt-parent = <&mpic>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "fsl,mpc8610-spi", "fsl,spi";
202 cell-index = <0>;
204 interrupt-parent = <&mpic>;
209 mmc-slot@0 {
210 compatible = "fsl,mpc8610hpcd-mmc-slot",
211 "mmc-spi-slot";
215 voltage-ranges = <3300 3300>;
216 spi-max-frequency = <50000000>;
224 interrupt-parent = <&mpic>;
228 mpic: interrupt-controller@40000 {
229 interrupt-controller;
230 #address-cells = <0>;
231 #interrupt-cells = <2>;
233 compatible = "chrp,open-pic";
234 device_type = "open-pic";
237 msi@41600 {
238 compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
240 msi-available-ranges = <0 0x100>;
250 interrupt-parent = <&mpic>;
253 global-utilities@e0000 {
254 #address-cells = <1>;
255 #size-cells = <1>;
256 compatible = "fsl,mpc8610-guts";
258 ranges = <0 0xe0000 0x1000>;
259 fsl,has-rstcr;
262 compatible = "fsl,mpc8610-pmc",
263 "fsl,mpc8641d-pmc";
269 compatible = "fsl,mpc8610-wdt";
274 compatible = "fsl,mpc8610-ssi";
275 cell-index = <0>;
277 interrupt-parent = <&mpic>;
279 fsl,mode = "i2s-slave";
280 codec-handle = <&cs4270>;
281 fsl,playback-dma = <&dma00>;
282 fsl,capture-dma = <&dma01>;
283 fsl,fifo-depth = <8>;
288 compatible = "fsl,mpc8610-ssi";
290 cell-index = <1>;
292 interrupt-parent = <&mpic>;
294 fsl,fifo-depth = <8>;
299 #address-cells = <1>;
300 #size-cells = <1>;
301 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
302 cell-index = <0>;
304 ranges = <0x0 0x21100 0x200>;
307 dma00: dma-channel@0 {
308 compatible = "fsl,mpc8610-dma-channel",
309 "fsl,ssi-dma-channel";
310 cell-index = <0>;
312 interrupt-parent = <&mpic>;
315 dma01: dma-channel@1 {
316 compatible = "fsl,mpc8610-dma-channel",
317 "fsl,ssi-dma-channel";
318 cell-index = <1>;
320 interrupt-parent = <&mpic>;
323 dma-channel@2 {
324 compatible = "fsl,mpc8610-dma-channel",
325 "fsl,eloplus-dma-channel";
326 cell-index = <2>;
328 interrupt-parent = <&mpic>;
331 dma-channel@3 {
332 compatible = "fsl,mpc8610-dma-channel",
333 "fsl,eloplus-dma-channel";
334 cell-index = <3>;
336 interrupt-parent = <&mpic>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
345 cell-index = <1>;
347 ranges = <0x0 0xc100 0x200>;
350 dma-channel@0 {
351 compatible = "fsl,mpc8610-dma-channel",
352 "fsl,eloplus-dma-channel";
353 cell-index = <0>;
355 interrupt-parent = <&mpic>;
358 dma-channel@1 {
359 compatible = "fsl,mpc8610-dma-channel",
360 "fsl,eloplus-dma-channel";
361 cell-index = <1>;
363 interrupt-parent = <&mpic>;
366 dma-channel@2 {
367 compatible = "fsl,mpc8610-dma-channel",
368 "fsl,eloplus-dma-channel";
369 cell-index = <2>;
371 interrupt-parent = <&mpic>;
374 dma-channel@3 {
375 compatible = "fsl,mpc8610-dma-channel",
376 "fsl,eloplus-dma-channel";
377 cell-index = <3>;
379 interrupt-parent = <&mpic>;
387 compatible = "fsl,mpc8610-pci";
389 #interrupt-cells = <1>;
390 #size-cells = <2>;
391 #address-cells = <3>;
393 bus-range = <0 0>;
394 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
397 clock-frequency = <33333333>;
398 interrupt-parent = <&mpic>;
400 interrupt-map-mask = <0xf800 0 0 7>;
401 interrupt-map = <
417 compatible = "fsl,mpc8641-pcie";
419 #interrupt-cells = <1>;
420 #size-cells = <2>;
421 #address-cells = <3>;
423 bus-range = <1 3>;
424 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
427 clock-frequency = <33333333>;
428 interrupt-parent = <&mpic>;
430 interrupt-map-mask = <0xf800 0 0 7>;
432 interrupt-map = <
449 #size-cells = <2>;
450 #address-cells = <3>;
452 ranges = <0x02000000 0x0 0xa0000000
460 #size-cells = <2>;
461 #address-cells = <3>;
462 ranges = <0x02000000 0x0 0xa0000000
471 #size-cells = <1>;
472 #address-cells = <2>;
474 ranges = <1 0 0x01000000 0 0
487 #address-cells = <3>;
488 #size-cells = <2>;
489 #interrupt-cells = <1>;
491 compatible = "fsl,mpc8641-pcie";
493 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
495 bus-range = <0 255>;
496 interrupt-map-mask = <0xf800 0 0 7>;
497 interrupt-map = <0x0000 0 0 1 &mpic 4 1
501 interrupt-parent = <&mpic>;
504 clock-frequency = <33333333>;