Lines Matching +full:0 +full:x10000

20 		reg = <0 0 0 0>;	// Filled by U-Boot
24 		reg = <0 0xe0005000 0 0x1000>;
28 		ranges = <0x0 0x0 0xe0000000 0x100000>;
32 		reg = <0 0xe0008000 0 0x1000>;
33 		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
34 			  0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
36 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
39 			/* IDSEL 0x11 J17 Slot 1 */
40 			0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
41 			0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
42 			0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
43 			0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
45 			/* IDSEL 0x12 J16 Slot 2 */
47 			0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
48 			0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
49 			0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
50 			0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
54 		reg = <0x0 0xe0009000 0x0 0x1000>;
55 		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
56 			  0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
57 		pcie@0 {
58 			ranges = <0x2000000 0x0 0x80000000
59 				  0x2000000 0x0 0x80000000
60 				  0x0 0x20000000
62 				  0x1000000 0x0 0x0
63 				  0x1000000 0x0 0x0
64 				  0x0 0x10000>;
69 		reg = <0x0 0xe000a000 0x0 0x1000>;
70 		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
71 			  0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
72 		pcie@0 {
73 			ranges = <0x2000000 0x0 0xa0000000
74 				  0x2000000 0x0 0xa0000000
75 				  0x0 0x10000000
77 				  0x1000000 0x0 0x0
78 				  0x1000000 0x0 0x0
79 				  0x0 0x10000>;
84 		reg = <0x0 0xe000b000 0x0 0x1000>;
85 		ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
86 			  0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
87 		pcie@0 {
88 			ranges = <0x2000000 0x0 0xb0000000
89 				  0x2000000 0x0 0xb0000000
90 				  0x0 0x100000
92 				  0x1000000 0x0 0x0
93 				  0x1000000 0x0 0x0
94 				  0x0 0x100000>;