Lines Matching +full:spi +full:- +full:tx +full:- +full:bus +full:- +full:width
17 /dts-v1/;
22 #address-cells = <1>;
23 #size-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <32768>; // L1, 32K
43 i-cache-size = <32768>; // L1, 32K
44 timebase-frequency = <66000000>;
45 bus-frequency = <264000000>;
46 clock-frequency = <528000000>;
56 #address-cells = <2>;
57 #size-cells = <1>;
58 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
59 "simple-bus";
65 compatible = "cfi-flash";
67 bank-width = <2>;
68 device-width = <1>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "fsl,mpc8360mds-bcsr";
78 bcsr13: gpio-controller@d {
79 #gpio-cells = <2>;
80 compatible = "fsl,mpc8360mds-bcsr-gpio";
82 gpio-controller;
88 #address-cells = <1>;
89 #size-cells = <1>;
91 compatible = "simple-bus";
94 bus-frequency = <264000000>;
103 compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
106 interrupt-parent = <&ipic>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 cell-index = <0>;
113 compatible = "fsl-i2c";
116 interrupt-parent = <&ipic>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 cell-index = <1>;
129 compatible = "fsl-i2c";
132 interrupt-parent = <&ipic>;
137 cell-index = <0>;
141 clock-frequency = <264000000>;
143 interrupt-parent = <&ipic>;
147 cell-index = <1>;
151 clock-frequency = <264000000>;
153 interrupt-parent = <&ipic>;
157 #address-cells = <1>;
158 #size-cells = <1>;
159 compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
162 interrupt-parent = <&ipic>;
164 cell-index = <0>;
165 dma-channel@0 {
166 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
168 cell-index = <0>;
169 interrupt-parent = <&ipic>;
172 dma-channel@80 {
173 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
175 cell-index = <1>;
176 interrupt-parent = <&ipic>;
179 dma-channel@100 {
180 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
182 cell-index = <2>;
183 interrupt-parent = <&ipic>;
186 dma-channel@180 {
187 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
189 cell-index = <3>;
190 interrupt-parent = <&ipic>;
199 interrupt-parent = <&ipic>;
200 fsl,num-channels = <4>;
201 fsl,channel-fifo-len = <24>;
202 fsl,exec-units-mask = <0x7e>;
203 fsl,descriptor-types-mask = <0x01010ebf>;
208 interrupt-controller;
209 #address-cells = <0>;
210 #interrupt-cells = <2>;
216 #address-cells = <1>;
217 #size-cells = <1>;
221 num-ports = <7>;
223 qe_pio_b: gpio-controller@18 {
224 #gpio-cells = <2>;
225 compatible = "fsl,mpc8360-qe-pario-bank",
226 "fsl,mpc8323-qe-pario-bank";
228 gpio-controller;
232 pio-map = <
255 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
256 2 8 2 0 1 0>; /* GTX125 - CLK9 */
259 pio-map = <
282 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
283 2 3 2 0 1 0 /* GTX125 - CLK4 */
292 #address-cells = <1>;
293 #size-cells = <1>;
298 brg-frequency = <0>;
299 bus-frequency = <396000000>;
300 fsl,qe-num-riscs = <2>;
301 fsl,qe-num-snums = <28>;
304 #address-cells = <1>;
305 #size-cells = <1>;
306 compatible = "fsl,qe-muram", "fsl,cpm-muram";
309 data-only@0 {
310 compatible = "fsl,qe-muram-data",
311 "fsl,cpm-muram-data";
317 compatible = "fsl,mpc8360-qe-gtm",
318 "fsl,qe-gtm", "fsl,gtm";
320 clock-frequency = <132000000>;
322 interrupt-parent = <&qeic>;
325 spi@4c0 {
326 cell-index = <0>;
327 compatible = "fsl,spi";
330 interrupt-parent = <&qeic>;
334 spi@500 {
335 cell-index = <1>;
336 compatible = "fsl,spi";
339 interrupt-parent = <&qeic>;
344 compatible = "fsl,mpc8360-qe-usb",
345 "fsl,mpc8323-qe-usb";
348 interrupt-parent = <&qeic>;
349 fsl,fullspeed-clock = "clk21";
350 fsl,lowspeed-clock = "brg9";
363 cell-index = <1>;
366 interrupt-parent = <&qeic>;
367 local-mac-address = [ 00 00 00 00 00 00 ];
368 rx-clock-name = "none";
369 tx-clock-name = "clk9";
370 phy-handle = <&phy0>;
371 phy-connection-type = "rgmii-id";
372 pio-handle = <&pio1>;
378 cell-index = <2>;
381 interrupt-parent = <&qeic>;
382 local-mac-address = [ 00 00 00 00 00 00 ];
383 rx-clock-name = "none";
384 tx-clock-name = "clk4";
385 phy-handle = <&phy1>;
386 phy-connection-type = "rgmii-id";
387 pio-handle = <&pio2>;
391 #address-cells = <1>;
392 #size-cells = <0>;
394 compatible = "fsl,ucc-mdio";
396 phy0: ethernet-phy@00 {
397 interrupt-parent = <&ipic>;
400 device_type = "ethernet-phy";
402 phy1: ethernet-phy@01 {
403 interrupt-parent = <&ipic>;
406 device_type = "ethernet-phy";
410 qeic: interrupt-controller@80 {
411 interrupt-controller;
412 compatible = "fsl,qe-ic";
413 #address-cells = <0>;
414 #interrupt-cells = <1>;
416 big-endian;
418 interrupt-parent = <&ipic>;
423 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
424 interrupt-map = <
467 interrupt-parent = <&ipic>;
469 bus-range = <0 0>;
473 clock-frequency = <66666666>;
474 #interrupt-cells = <1>;
475 #size-cells = <2>;
476 #address-cells = <3>;
479 compatible = "fsl,mpc8349-pci";