Lines Matching +full:interrupt +full:- +full:map +full:- +full:mask
12 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <16384>;
39 i-cache-size = <16384>;
40 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
52 #address-cells = <2>;
53 #size-cells = <1>;
54 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
57 interrupt-parent = <&ipic>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "cfi-flash";
72 bank-width = <2>;
73 device-width = <1>;
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "fsl,mpc8315-fcm-nand",
80 "fsl,elbc-fcm-nand";
83 u-boot@0 {
85 read-only;
98 #address-cells = <1>;
99 #size-cells = <1>;
101 compatible = "fsl,mpc8315-immr", "simple-bus";
104 bus-frequency = <0>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <0>;
116 compatible = "fsl-i2c";
119 interrupt-parent = <&ipic>;
127 #gpio-cells = <2>;
128 compatible = "fsl,mc9s08qg8-mpc8315erdb",
129 "fsl,mcu-mpc8349emitx";
131 gpio-controller;
136 cell-index = <0>;
140 interrupt-parent = <&ipic>;
145 #address-cells = <1>;
146 #size-cells = <1>;
147 compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
150 interrupt-parent = <&ipic>;
152 cell-index = <0>;
153 dma-channel@0 {
154 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
156 cell-index = <0>;
157 interrupt-parent = <&ipic>;
160 dma-channel@80 {
161 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
163 cell-index = <1>;
164 interrupt-parent = <&ipic>;
167 dma-channel@100 {
168 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
170 cell-index = <2>;
171 interrupt-parent = <&ipic>;
174 dma-channel@180 {
175 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
177 cell-index = <3>;
178 interrupt-parent = <&ipic>;
184 compatible = "fsl-usb2-dr";
186 #address-cells = <1>;
187 #size-cells = <0>;
188 interrupt-parent = <&ipic>;
194 #address-cells = <1>;
195 #size-cells = <1>;
196 cell-index = <0>;
202 local-mac-address = [ 00 00 00 00 00 00 ];
204 interrupt-parent = <&ipic>;
205 tbi-handle = <&tbi0>;
206 phy-handle = < &phy0 >;
207 fsl,magic-packet;
210 #address-cells = <1>;
211 #size-cells = <0>;
212 compatible = "fsl,gianfar-mdio";
215 phy0: ethernet-phy@0 {
216 interrupt-parent = <&ipic>;
219 device_type = "ethernet-phy";
222 phy1: ethernet-phy@1 {
223 interrupt-parent = <&ipic>;
226 device_type = "ethernet-phy";
229 tbi0: tbi-phy@11 {
231 device_type = "tbi-phy";
237 #address-cells = <1>;
238 #size-cells = <1>;
239 cell-index = <1>;
245 local-mac-address = [ 00 00 00 00 00 00 ];
247 interrupt-parent = <&ipic>;
248 tbi-handle = <&tbi1>;
249 phy-handle = < &phy1 >;
250 fsl,magic-packet;
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-tbi";
258 tbi1: tbi-phy@11 {
260 device_type = "tbi-phy";
266 cell-index = <0>;
270 clock-frequency = <133333333>;
272 interrupt-parent = <&ipic>;
276 cell-index = <1>;
280 clock-frequency = <133333333>;
282 interrupt-parent = <&ipic>;
291 interrupt-parent = <&ipic>;
292 fsl,num-channels = <4>;
293 fsl,channel-fifo-len = <24>;
294 fsl,exec-units-mask = <0x97c>;
295 fsl,descriptor-types-mask = <0x3a30abf>;
299 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
301 cell-index = <1>;
303 interrupt-parent = <&ipic>;
307 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
309 cell-index = <2>;
311 interrupt-parent = <&ipic>;
315 compatible = "fsl,mpc8315-gtm", "fsl,gtm";
318 interrupt-parent = <&ipic>;
319 clock-frequency = <133333333>;
323 compatible = "fsl,mpc8315-gtm", "fsl,gtm";
326 interrupt-parent = <&ipic>;
327 clock-frequency = <133333333>;
334 * sense == 2: Edge, high-to-low change
336 ipic: interrupt-controller@700 {
337 interrupt-controller;
338 #address-cells = <0>;
339 #interrupt-cells = <2>;
344 ipic-msi@7c0 {
345 compatible = "fsl,ipic-msi";
347 msi-available-ranges = <0 0x100>;
356 interrupt-parent = < &ipic >;
360 compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
361 "fsl,mpc8349-pmc";
364 interrupt-parent = <&ipic>;
365 fsl,mpc8313-wakeup-timer = <>m1>;
370 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
371 interrupt-map = <
372 /* IDSEL 0x0E -mini PCI */
378 /* IDSEL 0x0F -mini PCI */
384 /* IDSEL 0x10 - PCI slot */
389 interrupt-parent = <&ipic>;
391 bus-range = <0x0 0x0>;
395 clock-frequency = <66666666>;
396 #interrupt-cells = <1>;
397 #size-cells = <2>;
398 #address-cells = <3>;
401 compatible = "fsl,mpc8349-pci";
406 #address-cells = <3>;
407 #size-cells = <2>;
408 #interrupt-cells = <1>;
410 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
414 bus-range = <0 255>;
415 interrupt-map-mask = <0xf800 0 0 7>;
416 interrupt-map = <0 0 0 1 &ipic 1 8
420 clock-frequency = <0>;
423 #address-cells = <3>;
424 #size-cells = <2>;
437 #address-cells = <3>;
438 #size-cells = <2>;
439 #interrupt-cells = <1>;
441 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
445 bus-range = <0 255>;
446 interrupt-map-mask = <0xf800 0 0 7>;
447 interrupt-map = <0 0 0 1 &ipic 2 8
451 clock-frequency = <0>;
454 #address-cells = <3>;
455 #size-cells = <2>;
468 compatible = "gpio-leds";
472 default-state = "on";
477 linux,default-trigger = "ide-disk";