boot/dts/mpc8308rdb.dts

13 /dts-v1/;
17 	#address-cells = <1>;
18 	#size-cells = <1>;
29 		#address-cells = <1>;
30 		#size-cells = <0>;
35 			d-cache-line-size = <32>;
36 			i-cache-line-size = <32>;
37 			d-cache-size = <16384>;
38 			i-cache-size = <16384>;
39 			timebase-frequency = <0>;	// from bootloader
40 			bus-frequency = <0>;		// from bootloader
41 			clock-frequency = <0>;		// from bootloader
51 		#address-cells = <2>;
52 		#size-cells = <1>;
53 		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
56 		interrupt-parent = <&ipic>;
61 		ranges = <0x0 0x0 0xfe000000 0x00800000
67 			#address-cells = <1>;
68 			#size-cells = <1>;
69 			compatible = "cfi-flash";
71 			bank-width = <2>;
72 			device-width = <1>;
74 			u-boot@0 {
76 				read-only;
96 			#address-cells = <1>;
97 			#size-cells = <1>;
98 			compatible = "fsl,mpc8315-fcm-nand",
99 			             "fsl,elbc-fcm-nand";
109 		#address-cells = <1>;
110 		#size-cells = <1>;
112 		compatible = "fsl,mpc8308-immr", "simple-bus";
113 		ranges = <0 0xe0000000 0x00100000>;
115 		bus-frequency = <0>;
118 			#address-cells = <1>;
119 			#size-cells = <0>;
120 			cell-index = <0>;
121 			compatible = "fsl-i2c";
124 			interrupt-parent = <&ipic>;
133 			compatible = "fsl-usb2-dr";
135 			#address-cells = <1>;
136 			#size-cells = <0>;
137 			interrupt-parent = <&ipic>;
144 			#address-cells = <1>;
145 			#size-cells = <1>;
146 			ranges = <0x0 0x24000 0x1000>;
148 			cell-index = <0>;
153 			local-mac-address = [ 00 00 00 00 00 00 ];
155 			interrupt-parent = <&ipic>;
156 			tbi-handle = < &tbi0 >;
157 			phy-handle = < &phy2 >;
158 			fsl,magic-packet;
161 				#address-cells = <1>;
162 				#size-cells = <0>;
163 				compatible = "fsl,gianfar-mdio";
165 				phy2: ethernet-phy@2 {
166 					interrupt-parent = <&ipic>;
169 					device_type = "ethernet-phy";
171 				tbi0: tbi-phy@11 {
173 					device_type = "tbi-phy";
179 			#address-cells = <1>;
180 			#size-cells = <1>;
181 			cell-index = <1>;
186 			ranges = <0x0 0x25000 0x1000>;
187 			local-mac-address = [ 00 00 00 00 00 00 ];
189 			interrupt-parent = <&ipic>;
190 			tbi-handle = < &tbi1 >;
192 			fixed-link = <1 1 1000 0 0>;
193 			fsl,magic-packet;
196 				#address-cells = <1>;
197 				#size-cells = <0>;
198 				compatible = "fsl,gianfar-tbi";
201 				tbi1: tbi-phy@11 {
203 					device_type = "tbi-phy";
209 			cell-index = <0>;
213 			clock-frequency = <133333333>;
215 			interrupt-parent = <&ipic>;
219 			cell-index = <1>;
223 			clock-frequency = <133333333>;
225 			interrupt-parent = <&ipic>;
229 			#gpio-cells = <2>;
231 			compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
234 			interrupt-parent = <&ipic>;
235 			gpio-controller;
242 		 * sense == 2: Edge, high-to-low change
244 		ipic: interrupt-controller@700 {
246 			interrupt-controller;
247 			#address-cells = <0>;
248 			#interrupt-cells = <2>;
253 		ipic-msi@7c0 {
254 			compatible = "fsl,ipic-msi";
256 			msi-available-ranges = <0x0 0x100>;
265 			interrupt-parent = < &ipic >;
269 			compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma";
273 			interrupt-parent = < &ipic >;
279 		#address-cells = <3>;
280 		#size-cells = <2>;
281 		#interrupt-cells = <1>;
283 		compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
286 		ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
288 		bus-range = <0 0>;
289 		interrupt-map-mask = <0xf800 0 0 7>;
290 		interrupt-map = <0 0 0 1 &ipic 1 8
295 		interrupt-parent = <&ipic>;
296 		clock-frequency = <0>;
299 			#address-cells = <3>;
300 			#size-cells = <2>;
303 			ranges = <0x02000000 0 0xa0000000