boot/dts/mpc8308_p1m.dts

12 /dts-v1/;
16 	#address-cells = <1>;
17 	#size-cells = <1>;
28 		#address-cells = <1>;
29 		#size-cells = <0>;
34 			d-cache-line-size = <32>;
35 			i-cache-line-size = <32>;
36 			d-cache-size = <16384>;
37 			i-cache-size = <16384>;
38 			timebase-frequency = <0>;	// from bootloader
39 			bus-frequency = <0>;		// from bootloader
40 			clock-frequency = <0>;		// from bootloader
50 		#address-cells = <2>;
51 		#size-cells = <1>;
52 		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
55 		interrupt-parent = <&ipic>;
57 		ranges = <0x0 0x0 0xfc000000 0x04000000
62 			#address-cells = <1>;
63 			#size-cells = <1>;
64 			compatible = "cfi-flash";
66 			bank-width = <2>;
67 			device-width = <1>;
69 			u-boot@0 {
71 				read-only;
97 			interrups-parent = <&ipic>;
101 			compatible = "denx,mpc8308_p1m-cpld";
104 			interrups-parent = <&ipic>;
109 		#address-cells = <1>;
110 		#size-cells = <1>;
112 		compatible = "fsl,mpc8308-immr", "simple-bus";
113 		ranges = <0 0xe0000000 0x00100000>;
115 		bus-frequency = <0>;
118 			#address-cells = <1>;
119 			#size-cells = <0>;
120 			compatible = "fsl-i2c";
123 			interrupt-parent = <&ipic>;
132 			#address-cells = <1>;
133 			#size-cells = <0>;
134 			compatible = "fsl-i2c";
137 			interrupt-parent = <&ipic>;
158 			compatible = "fsl-usb2-dr";
160 			#address-cells = <1>;
161 			#size-cells = <0>;
162 			interrupt-parent = <&ipic>;
169 			#address-cells = <1>;
170 			#size-cells = <1>;
171 			ranges = <0x0 0x24000 0x1000>;
173 			cell-index = <0>;
178 			local-mac-address = [ 00 00 00 00 00 00 ];
180 			interrupt-parent = <&ipic>;
181 			phy-handle = < &phy1 >;
184 				#address-cells = <1>;
185 				#size-cells = <0>;
186 				compatible = "fsl,gianfar-mdio";
188 				phy1: ethernet-phy@1 {
189 					interrupt-parent = <&ipic>;
192 					device_type = "ethernet-phy";
194 				phy2: ethernet-phy@2 {
195 					interrupt-parent = <&ipic>;
198 					device_type = "ethernet-phy";
200 				tbi0: tbi-phy@11 {
202 					device_type = "tbi-phy";
208 			#address-cells = <1>;
209 			#size-cells = <1>;
210 			cell-index = <1>;
215 			ranges = <0x0 0x25000 0x1000>;
216 			local-mac-address = [ 00 00 00 00 00 00 ];
218 			interrupt-parent = <&ipic>;
219 			phy-handle = < &phy2 >;
222 				#address-cells = <1>;
223 				#size-cells = <0>;
224 				compatible = "fsl,gianfar-tbi";
226 				tbi1: tbi-phy@11 {
228 					device_type = "tbi-phy";
234 			cell-index = <0>;
238 			clock-frequency = <133333333>;
240 			interrupt-parent = <&ipic>;
244 			cell-index = <1>;
248 			clock-frequency = <133333333>;
250 			interrupt-parent = <&ipic>;
254 			#gpio-cells = <2>;
255 			compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
258 			interrupt-parent = <&ipic>;
259 			gpio-controller;
263 			compatible = "fsl,mpc8308-gtm", "fsl,gtm";
266 			interrupt-parent = <&ipic>;
267 			clock-frequency = <133333333>;
274 		 * sense == 2: Edge, high-to-low change
276 		ipic: interrupt-controller@700 {
278 			interrupt-controller;
279 			#address-cells = <0>;
280 			#interrupt-cells = <2>;
285 		ipic-msi@7c0 {
286 			compatible = "fsl,ipic-msi";
288 			msi-available-ranges = <0x0 0x100>;
297 			interrupt-parent = < &ipic >;
301 			compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma";
305 			interrupt-parent = < &ipic >;
311 		#address-cells = <3>;
312 		#size-cells = <2>;
313 		#interrupt-cells = <1>;
315 		compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
318 		ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
320 		bus-range = <0 0>;
321 		interrupt-map-mask = <0 0 0 0>;
322 		interrupt-map = <0 0 0 0 &ipic 1 8>;
324 		interrupt-parent = <&ipic>;
325 		clock-frequency = <0>;
328 			#address-cells = <3>;
329 			#size-cells = <2>;
332 			ranges = <0x02000000 0 0xa0000000