boot/dts/icon.dts

11 /dts-v1/;
14 	#address-cells = <2>;
15 	#size-cells = <2>;
18 	dcr-parent = <&{/cpus/cpu@0}>;
28 		#address-cells = <1>;
29 		#size-cells = <0>;
35 			clock-frequency = <0>; /* Filled in by U-Boot */
36 			timebase-frequency = <0>; /* Filled in by U-Boot */
37 			i-cache-line-size = <32>;
38 			d-cache-line-size = <32>;
39 			i-cache-size = <32768>;
40 			d-cache-size = <32768>;
41 			dcr-controller;
42 			dcr-access-method = "native";
43 			reset-type = <2>;	/* Use chip-reset */
49 		reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
52 	UIC0: interrupt-controller0 {
53 		compatible = "ibm,uic-440spe","ibm,uic";
54 		interrupt-controller;
55 		cell-index = <0>;
56 		dcr-reg = <0x0c0 0x009>;
57 		#address-cells = <0>;
58 		#size-cells = <0>;
59 		#interrupt-cells = <2>;
62 	UIC1: interrupt-controller1 {
63 		compatible = "ibm,uic-440spe","ibm,uic";
64 		interrupt-controller;
65 		cell-index = <1>;
66 		dcr-reg = <0x0d0 0x009>;
67 		#address-cells = <0>;
68 		#size-cells = <0>;
69 		#interrupt-cells = <2>;
71 		interrupt-parent = <&UIC0>;
74 	UIC2: interrupt-controller2 {
75 		compatible = "ibm,uic-440spe","ibm,uic";
76 		interrupt-controller;
77 		cell-index = <2>;
78 		dcr-reg = <0x0e0 0x009>;
79 		#address-cells = <0>;
80 		#size-cells = <0>;
81 		#interrupt-cells = <2>;
83 		interrupt-parent = <&UIC0>;
86 	UIC3: interrupt-controller3 {
87 		compatible = "ibm,uic-440spe","ibm,uic";
88 		interrupt-controller;
89 		cell-index = <3>;
90 		dcr-reg = <0x0f0 0x009>;
91 		#address-cells = <0>;
92 		#size-cells = <0>;
93 		#interrupt-cells = <2>;
95 		interrupt-parent = <&UIC0>;
99 		compatible = "ibm,sdr-440spe";
100 		dcr-reg = <0x00e 0x002>;
104 		compatible = "ibm,cpr-440spe";
105 		dcr-reg = <0x00c 0x002>;
109 		compatible = "ibm,mq-440spe";
110 		dcr-reg = <0x040 0x020>;
114 		compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
115 		#address-cells = <2>;
116 		#size-cells = <1>;
117 		/*        addr-child     addr-parent    size */
128 		clock-frequency = <0>; /* Filled in by U-Boot */
131 			compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
132 			dcr-reg = <0x010 0x002>;
136 			compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
137 			dcr-reg = <0x180 0x062>;
138 			num-tx-chans = <2>;
139 			num-rx-chans = <1>;
140 			interrupt-parent = <&MAL0>;
142 			#interrupt-cells = <1>;
143 			#address-cells = <0>;
144 			#size-cells = <0>;
145 			interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
153 			compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
154 			#address-cells = <1>;
155 			#size-cells = <1>;
157 			clock-frequency = <0>; /* Filled in by U-Boot */
160 				compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
161 				dcr-reg = <0x012 0x002>;
162 				#address-cells = <2>;
163 				#size-cells = <1>;
164 				clock-frequency = <0>; /* Filled in by U-Boot */
165 				/* ranges property is supplied by U-Boot */
167 				interrupt-parent = <&UIC1>;
170 					compatible = "cfi-flash";
171 					bank-width = <2>;
173 					#address-cells = <1>;
174 					#size-cells = <1>;
196 						label = "u-boot";
203 					interrupt-parent = <&UIC2>;
213 				virtual-reg = <0xa0000200>;
214 				clock-frequency = <0>; /* Filled in by U-Boot */
215 				current-speed = <115200>;
216 				interrupt-parent = <&UIC0>;
224 				virtual-reg = <0xa0000300>;
225 				clock-frequency = <0>;
226 				current-speed = <0>;
227 				interrupt-parent = <&UIC0>;
236 				virtual-reg = <0xa0000600>;
237 				clock-frequency = <0>;
238 				current-speed = <0>;
239 				interrupt-parent = <&UIC1>;
244 				compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
246 				interrupt-parent = <&UIC0>;
251 				compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
253 				interrupt-parent = <&UIC0>;
255 				#address-cells = <1>;
256 				#size-cells = <0>;
265 				linux,network-index = <0x0>;
267 				compatible = "ibm,emac-440spe", "ibm,emac4";
268 				interrupt-parent = <&UIC1>;
271 				local-mac-address = [000000000000];
272 				mal-device = <&MAL0>;
273 				mal-tx-channel = <0>;
274 				mal-rx-channel = <0>;
275 				cell-index = <0>;
276 				max-frame-size = <9000>;
277 				rx-fifo-size = <4096>;
278 				tx-fifo-size = <2048>;
279 				phy-mode = "gmii";
280 				phy-map = <0x00000000>;
281 				has-inverted-stacr-oc;
282 				has-new-stacr-staopc;
288 			#interrupt-cells = <1>;
289 			#size-cells = <2>;
290 			#address-cells = <3>;
291 			compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
293 			large-inbound-windows;
294 			enable-msi-hole;
308 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
311 			bus-range = <0x0 0xf>;
313 			/* PCI-X interrupt (SM502) is routed to extIRQ10 (UIC1, 19) */
314 			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
315 			interrupt-map = <0x0 0x0 0x0 0x0 &UIC1 19 0x8>;
320 			#interrupt-cells = <1>;
321 			#size-cells = <2>;
322 			#address-cells = <3>;
323 			compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
328 			dcr-reg = <0x100 0x020>;
329 			sdr-base = <0x300>;
338 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
341 			bus-range = <0x10 0x1f>;
345 			 * We are de-swizzling here because the numbers are actually for
348 			 * below are basically de-swizzled numbers.
351 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
352 			interrupt-map = <
361 			#interrupt-cells = <1>;
362 			#size-cells = <2>;
363 			#address-cells = <3>;
364 			compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
369 			dcr-reg = <0x120 0x020>;
370 			sdr-base = <0x340>;
379 			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
382 			bus-range = <0x20 0x2f>;
386 			 * We are de-swizzling here because the numbers are actually for
389 			 * below are basically de-swizzled numbers.
392 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
393 			interrupt-map = <
401 			compatible = "ibm,i2o-440spe";
403 			dcr-reg = <0x060 0x020>;
407 			compatible = "ibm,dma-440spe";
408 			cell-index = <0>;
410 			dcr-reg = <0x060 0x020>;
411 			interrupt-parent = <&DMA0>;
413 			#interrupt-cells = <1>;
414 			#address-cells = <0>;
415 			#size-cells = <0>;
416 			interrupt-map = <
422 			compatible = "ibm,dma-440spe";
423 			cell-index = <1>;
425 			dcr-reg = <0x060 0x020>;
426 			interrupt-parent = <&DMA1>;
428 			#interrupt-cells = <1>;
429 			#address-cells = <0>;
430 			#size-cells = <0>;
431 			interrupt-map = <
436 		xor-accel@400200000 {
437 			compatible = "amcc,xor-accelerator";
439 			interrupt-parent = <&UIC1>;
445 		linux,stdout-path = "/plb/opb/serial@f0000200";