Lines Matching +full:interrupt +full:- +full:map +full:- +full:mask

11 /dts-v1/;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 dcr-parent = <&{/cpus/cpu@0}>;
27 #address-cells = <1>;
28 #size-cells = <0>;
34 clock-frequency = <1600000000>; // 1.6 GHz
35 timebase-frequency = <100000000>; // 100Mhz
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <32768>;
39 d-cache-size = <32768>;
40 dcr-controller;
41 dcr-access-method = "native";
48 clock-frequency = <1600000000>; // 1.6 GHz
49 timebase-frequency = <100000000>; // 100Mhz
50 i-cache-line-size = <32>;
51 d-cache-line-size = <32>;
52 i-cache-size = <32768>;
53 d-cache-size = <32768>;
54 dcr-controller;
55 dcr-access-method = "native";
57 enable-method = "spin-table";
58 cpu-release-addr = <0x0 0x01f00000>;
67 MPIC: interrupt-controller {
68 compatible = "chrp,open-pic";
69 interrupt-controller;
70 dcr-reg = <0xffc00000 0x00040000>;
71 #address-cells = <0>;
72 #size-cells = <0>;
73 #interrupt-cells = <2>;
79 #address-cells = <2>;
80 #size-cells = <2>;
82 clock-frequency = <200000000>; // 200Mhz
85 compatible = "ibm,opb-4xx", "ibm,opb";
86 #address-cells = <1>;
87 #size-cells = <1>;
89 * 32-bit range
93 clock-frequency = <100000000>;
99 virtual-reg = <0xe1000000>;
100 clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
101 current-speed = <115200>;
102 interrupt-parent = <&MPIC>;
107 compatible = "ibm,iic-currituck", "ibm,iic";
109 interrupt-parent = <&MPIC>;
111 #address-cells = <1>;
112 #size-cells = <0>;
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
130 dcr-reg = <0x80 0x20>;
137 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
140 bus-range = <0x0 0xf>;
144 * We are de-swizzling here because the numbers are actually for
147 * below are basically de-swizzled numbers.
150 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
151 interrupt-map = <
160 #interrupt-cells = <1>;
161 #size-cells = <2>;
162 #address-cells = <3>;
163 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
168 dcr-reg = <0x60 0x20>;
174 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
177 bus-range = <0x0 0xf>;
181 * We are de-swizzling here because the numbers are actually for
184 * below are basically de-swizzled numbers.
187 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
188 interrupt-map = <
197 #interrupt-cells = <1>;
198 #size-cells = <2>;
199 #address-cells = <3>;
200 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
205 dcr-reg = <0xA0 0x20>;
211 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
214 bus-range = <0x0 0xf>;
218 * We are de-swizzling here because the numbers are actually for
221 * below are basically de-swizzled numbers.
224 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
225 interrupt-map = <
235 linux,stdout-path = &UART0;