parisc/kernel/perf_asm.S

2 /*    low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
4  *    Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
5  *    Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
18  *    along with this program; if not, write to the Free Software
19  *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
43 ; The coprocessor only needs to be enabled when
58 	ssm     0,0                     ; dummy op to ensure completion
84 	ssm     0,0                     ; dummy op to ensure completion
99 ;*	is shifted shifted backup immediately.  This is to compensate
104 ;*	arg0 : rdr to be read
111 ;*	arg0 : rdr to be read
113 ;*	%r24  - original DR2 value
114 ;*	%r1   - scratch
115 ;*  %r29  - scratch
130 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
131 ; shifting is done, from or to, remote diagnose registers.
145 ; Cacheline start (32-byte cacheline)
150 	extrd,u		arg1,63,6,%r1	; setup shift amount by bits to move
154 	blr  		%r1,%r0		; branch to 8-instruction sequence
158 ; Cacheline start (32-byte cacheline)
562 ;*	This routine moves data to the RDR's.  The double-word that
563 ;*	arg1 points to is loaded and moved into the staging register.
565 ;*	to move the data to the RDR.
569 ;*	arg1 = 64-bit value to write
570 ;*	%r24 - DR2 | DR2_SLOW_RET
571 ;*	%r23 - original DR2 value
585 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
586 ; shifting is done, from or to, the remote diagnose registers.
593 	MTDIAG_1	(25)		; data to the staging register
595 	blr		    %r1,%r0	; branch to 8-instruction sequence
599 	; RDR 0 write sequence
601 	sync				; RDR 0 write sequence
611 	; RDR 1 write sequence
623 	; RDR 2 write sequence
635 	; RDR 3 write sequence
647 	; RDR 4 write sequence
659 	; RDR 5 write sequence
671 	; RDR 6 write sequence
683 	; RDR 7 write sequence
695 	; RDR 8 write sequence
707 	; RDR 9 write sequence
719 	; RDR 10 write sequence
731 	; RDR 11 write sequence
743 	; RDR 12 write sequence
755 	; RDR 13 write sequence
767 	; RDR 14 write sequence
779 	; RDR 15 write sequence
791 	; RDR 16 write sequence
803 	; RDR 17 write sequence
815 	; RDR 18 write sequence
827 	; RDR 19 write sequence
839 	; RDR 20 write sequence
851 	; RDR 21 write sequence
863 	; RDR 22 write sequence
875 	; RDR 23 write sequence
887 	; RDR 24 write sequence
899 	; RDR 25 write sequence
911 	; RDR 26 write sequence
923 	; RDR 27 write sequence
935 	; RDR 28 write sequence
947 	; RDR 29 write sequence
959 	; RDR 30 write sequence
971 	; RDR 31 write sequence
997 ;*	is shifted shifted backup immediately.  This is to compensate
1002 ;*	arg0 : rdr to be read
1009 ;*	arg0 : rdr to be read
1011 ;*	%r24 - original DR2 value
1012 ;*	%r23 - DR2 | DR2_SLOW_RET
1013 ;*	%r1  - scratch
1024 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1025 ; shifting is done, from or to, remote diagnose registers.
1038 ; Start of next 32-byte cacheline
1047 	blr 		%r1,%r0		; branch to 8-instruction sequence
1051 ; Start of next 32-byte cacheline
1354 ;*	This routine moves data to the RDR's.  The double-word that
1355 ;*	arg1 points to is loaded and moved into the staging register.
1357 ;*	to move the data to the RDR.
1369 ;*	%r24 - DR2 | DR2_SLOW_RET
1370 ;*	%r23 - original DR2 value
1380 ; NOTE: The PCX-U ERS states that DR2_SLOW_RET must be set before any
1381 ; shifting is done, from or to, the remote diagnose registers.
1389 	MTDIAG_1	(25)		; data to the staging register
1391 	blr		%r1,%r0		; branch to 8-instruction sequence
1395 ; 32-byte cachline aligned
1398 	sync				; RDR 0 write sequence
1407 	sync				; RDR 1 write sequence
1416 	sync				; RDR 2 write sequence
1425 	sync				; RDR 3 write sequence
1434 	sync				; RDR 4 write sequence
1443 	sync				; RDR 5 write sequence
1452 	sync				; RDR 6 write sequence
1461 	sync				; RDR 7 write sequence
1470 	sync				; RDR 8 write sequence
1479 	sync				; RDR 9 write sequence
1488 	sync				; RDR 10 write sequence
1497 	sync				; RDR 11 write sequence
1506 	sync				; RDR 12 write sequence
1515 	sync				; RDR 13 write sequence
1524 	sync				; RDR 14 write sequence
1533 	sync				; RDR 15 write sequence
1542 	sync				; RDR 16 write sequence
1551 	sync				; RDR 17 write sequence
1560 	sync				; RDR 18 write sequence
1569 	sync				; RDR 19 write sequence
1578 	sync				; RDR 20 write sequence
1587 	sync				; RDR 21 write sequence
1596 	sync				; RDR 22 write sequence
1605 	sync				; RDR 23 write sequence
1614 	sync				; RDR 24 write sequence
1623 	sync				; RDR 25 write sequence
1632 	sync				; RDR 26 write sequence
1641 	sync				; RDR 27 write sequence
1650 	sync				; RDR 28 write sequence
1659 	sync				; RDR 29 write sequence
1668 	sync				; RDR 30 write sequence
1677 	sync				; RDR 31 write sequence