Lines Matching +full:0 +full:x2000
14 #define ROM_OFFSET 0x10C00000
15 #define STACK_GAURD 0x10
21 movew #0x2700, %sr /* Exceptions off! */
23 #if 0
25 moveb #0x00, 0xfffffb0b /* Watchdog off */
26 moveb #0x10, 0xfffff000 /* SCR */
28 movew #0x2400, 0xfffff200 /* PLLCR */
29 movew #0x0123, 0xfffff202 /* PLLFSR */
31 moveb #0x00, 0xfffff40b /* enable chip select */
32 moveb #0x00, 0xfffff423 /* enable /DWE */
33 moveb #0x08, 0xfffffd0d /* disable hardmap */
34 moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
36 movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
37 movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
39 movew #0x8f00, 0xfffffc00 /* DRAM configuration */
40 movew #0x9667, 0xfffffc02 /* DRAM control */
41 movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
42 movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
44 moveb #0x40, 0xfffff300 /* IVR */
45 movel #0x007FFFFF, %d0 /* IMR */
46 movel %d0, 0xfffff304
48 moveb 0xfffff42b, %d0
49 andb #0xe0, %d0
50 moveb %d0, 0xfffff42b
52 moveb #0x08, 0xfffff907 /* Ignore CTS */
53 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
54 movew #0xe100, 0xfffff900 /* enable */
63 moveb %d7,0xfffff907 /* No absolute addresses */
65 movew 0xfffff906, %d7
66 andw #0x2000, %d7
72 moveb %d7,0xfffff907 /* No absolute addresses */
74 movew 0xfffff906, %d7
75 andw #0x2000, %d7
78 moveal #0x007ffff0, %ssp
82 /* Copy 0 to %a0 until %a0 >= %a1 */
84 movel #0, %a0@+
93 pea 0
96 pea 0
116 moveb %d7,0xfffff907
118 movew 0xfffff906, %d7
119 andw #0x2000, %d7
132 .long 0
134 .long 0
136 .long 0
138 .long 0
141 .long 0