Lines Matching full:description
21 /* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
26 /* Description: Agent, must be 0 for SHub */
31 /* Description: Processor ID, same setting as on targeted McKinley */
36 /* Description: Optional interrupt vector area, 2MB aligned */
41 /* Description: Targeted McKinley interrupt vector */
46 /* Description: Send Interrupt Message to PI, This generates a puls */
93 /* Description: Deadlock response detected */
99 /* Description: Count of currently pending PIO writes */
115 /* Description: Pending Junk Bus UART Interrupt */
120 /* Description: Pending IPI Interrupt */
125 /* Description: Pending II 0 Interrupt */
130 /* Description: Pending II 1 Interrupt */
135 /* Description: Pending SHUB 2 EXT IO INT2 */
140 /* Description: Pending SHUB 2 EXT IO INT3 */
171 /* Description: Type */
175 /* Description: Page Size */
179 /* Description: Region ID */
183 /* Description: Start */
193 /* Description: PTC_1 Start */
203 /* Description: Type */
207 /* Description: Page Size */
211 /* Description: Region ID */
215 /* Description: Start */
219 /* Description: Region ID */
234 /* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
239 /* Description: Agent, must be 0 for SHub */
244 /* Description: Processor ID, same setting as on targeted McKinley */
249 /* Description: Optional interrupt vector area, 2MB aligned */
254 /* Description: Targeted McKinley interrupt vector */
269 /* Description: Enable RTC 1 Interrupt */
285 /* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
290 /* Description: Agent, must be 0 for SHub */
295 /* Description: Processor ID, same setting as on targeted McKinley */
300 /* Description: Optional interrupt vector area, 2MB aligned */
305 /* Description: Targeted McKinley interrupt vector */
320 /* Description: Enable RTC 2 Interrupt */
336 /* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */
341 /* Description: Agent, must be 0 for SHub */
346 /* Description: Processor ID, same setting as on targeted McKinley */
351 /* Description: Optional interrupt vector area, 2MB aligned */
356 /* Description: Targeted McKinley interrupt vector */
371 /* Description: Enable RTC 3 Interrupt */
377 /* Description: Pending RTC 1 Interrupt */
382 /* Description: Pending RTC 2 Interrupt */
387 /* Description: Pending RTC 3 Interrupt */
413 /* Description: Real Time Clock Compare */
428 /* Description: Real Time Clock Compare */
443 /* Description: Real Time Clock Compare */