Lines Matching +full:interrupt +full:- +full:controller
3 #address-cells = <1>;
4 #size-cells = <1>;
7 #address-cells = <1>;
8 #size-cells = <0>;
18 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <1>;
24 core_pic: interrupt-controller {
25 interrupt-controller;
26 #interrupt-cells = <1>;
27 compatible = "ti,c64x+core-pic";
30 megamod_pic: interrupt-controller@1800000 {
31 compatible = "ti,c64x+megamod-pic";
32 interrupt-controller;
33 #interrupt-cells = <1>;
34 interrupt-parent = <&core_pic>;
38 cache-controller@1840000 {
43 device-state-controller@2880800 {
47 ti,dscr-devstat = <0x20>;
48 ti,dscr-silicon-rev = <0x18 28 0xf>;
49 ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
51 ti,dscr-kick-regs = <0x38 0x83E70B13
60 clock-controller@29a0000 {
61 compatible = "ti,c6457-pll", "ti,c64x+pll";
63 ti,c64x+pll-bypass-delay = <300>;
64 ti,c64x+pll-reset-delay = <24000>;
65 ti,c64x+pll-lock-delay = <50000>;