Lines Matching +full:interconnect +full:-
2 * linux/arch/arm/mach-omap2/prcm.c
38 #include "prm-regbits-24xx.h"
39 #include "prm-regbits-44xx.h"
80 * access DDR memory after warm-reset. in omap_prcm_restart()
81 * This situation occurs while the warm-reset happens during a read in omap_prcm_restart()
85 * SDRC is not sensitive to the warm reset, but the interconnect is in omap_prcm_restart()
87 * interconnect logic and DDR memory state. in omap_prcm_restart()
90 * 1. enable self-refresh on idle request in omap_prcm_restart()
99 * 2. Re-initialize SMS, SDRC and memory in omap_prcm_restart()
113 * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
152 if (omap2_globals->prm) in omap2_set_globals_prcm()
153 prm_base = omap2_globals->prm; in omap2_set_globals_prcm()
154 if (omap2_globals->cm) in omap2_set_globals_prcm()
155 cm_base = omap2_globals->cm; in omap2_set_globals_prcm()
156 if (omap2_globals->cm2) in omap2_set_globals_prcm()
157 cm2_base = omap2_globals->cm2; in omap2_set_globals_prcm()