Lines Matching +full:0 +full:xe0007000

38 #define MSM_VIC_BASE          IOMEM(0xE0000000)
39 #define MSM_VIC_PHYS          0xC0080000
42 #define MSM7X30_CSR_PHYS      0xC0100000
45 #define MSM_DMOV_BASE         IOMEM(0xE0002000)
46 #define MSM_DMOV_PHYS         0xAC400000
49 #define MSM7X30_GPIO1_PHYS        0xAC001000
52 #define MSM7X30_GPIO2_PHYS        0xAC101000
55 #define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
56 #define MSM_CLK_CTL_PHYS      0xAB800000
59 #define MSM_CLK_CTL_SH2_BASE  IOMEM(0xE0006000)
60 #define MSM_CLK_CTL_SH2_PHYS  0xABA01000
63 #define MSM_ACC_BASE          IOMEM(0xE0007000)
64 #define MSM_ACC_PHYS          0xC0101000
67 #define MSM_SAW_BASE          IOMEM(0xE0008000)
68 #define MSM_SAW_PHYS          0xC0102000
71 #define MSM_GCC_BASE	      IOMEM(0xE0009000)
72 #define MSM_GCC_PHYS	      0xC0182000
75 #define MSM_TCSR_BASE	      IOMEM(0xE000A000)
76 #define MSM_TCSR_PHYS	      0xAB600000
79 #define MSM_SHARED_RAM_BASE   IOMEM(0xE0100000)
80 #define MSM_SHARED_RAM_PHYS   0x00100000
83 #define MSM_UART1_PHYS        0xACA00000
86 #define MSM_UART2_PHYS        0xACB00000
89 #define MSM_UART3_PHYS        0xACC00000
92 #define MSM_MDC_BASE	      IOMEM(0xE0200000)
93 #define MSM_MDC_PHYS	      0xAA500000
96 #define MSM_AD5_BASE          IOMEM(0xE0300000)
97 #define MSM_AD5_PHYS          0xA7000000
100 #define MSM_HSUSB_PHYS        0xA3600000