Lines Matching +full:interrupt +full:- +full:controller
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,1176jz-s";
26 clock-frequency = <400000000>;
28 d-cache-line-size = <32>;
29 d-cache-size = <32768>;
30 i-cache-line-size = <32>;
31 i-cache-size = <32768>;
36 #address-cells = <1>;
37 #size-cells = <1>;
41 compatible = "fixed-clock";
42 clock-outputs = "bus", "pclk";
43 clock-frequency = <200000000>;
44 ref-clock = <&ref_clk>, "ref";
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
61 compatible = "snps,dw-dmac";
67 compatible = "snps,dw-dmac";
72 vic0: interrupt-controller@60000 {
73 compatible = "arm,pl192-vic";
74 interrupt-controller;
76 #interrupt-cells = <1>;
79 vic1: interrupt-controller@64000 {
80 compatible = "arm,pl192-vic";
81 interrupt-controller;
83 #interrupt-cells = <1>;
86 fuse: picoxcell-fuse@80000 {
87 compatible = "picoxcell,fuse-pc3x2";
91 ssi: picoxcell-spi@90000 {
94 interrupt-parent = <&vic0>;
99 compatible = "picochip,spacc-ipsec";
101 interrupt-parent = <&vic0>;
103 ref-clock = <&pclk>, "ref";
107 compatible = "picochip,spacc-srtp";
109 interrupt-parent = <&vic0>;
114 compatible = "picochip,spacc-l2";
116 interrupt-parent = <&vic0>;
118 ref-clock = <&pclk>, "ref";
122 compatible = "simple-bus";
123 #address-cells = <1>;
124 #size-cells = <1>;
128 compatible = "picochip,pc3x2-rtc";
129 clock-freq = <200000000>;
131 interrupt-parent = <&vic1>;
136 compatible = "picochip,pc3x2-timer";
137 interrupt-parent = <&vic0>;
139 clock-freq = <200000000>;
144 compatible = "picochip,pc3x2-timer";
145 interrupt-parent = <&vic0>;
147 clock-freq = <200000000>;
152 compatible = "picochip,pc3x2-timer";
153 interrupt-parent = <&vic0>;
155 clock-freq = <200000000>;
160 compatible = "picochip,pc3x2-timer";
161 interrupt-parent = <&vic0>;
163 clock-freq = <200000000>;
168 compatible = "snps,dw-apb-gpio";
170 #address-cells = <1>;
171 #size-cells = <0>;
172 reg-io-width = <4>;
174 banka: gpio-controller@0 {
175 compatible = "snps,dw-apb-gpio-bank";
176 gpio-controller;
177 #gpio-cells = <2>;
178 gpio-generic,nr-gpio = <8>;
180 regoffset-dat = <0x50>;
181 regoffset-set = <0x00>;
182 regoffset-dirout = <0x04>;
185 bankb: gpio-controller@1 {
186 compatible = "snps,dw-apb-gpio-bank";
187 gpio-controller;
188 #gpio-cells = <2>;
189 gpio-generic,nr-gpio = <8>;
191 regoffset-dat = <0x54>;
192 regoffset-set = <0x0c>;
193 regoffset-dirout = <0x10>;
198 compatible = "snps,dw-apb-uart";
200 interrupt-parent = <&vic1>;
202 clock-frequency = <3686400>;
203 reg-shift = <2>;
204 reg-io-width = <4>;
208 compatible = "snps,dw-apb-uart";
210 interrupt-parent = <&vic1>;
212 clock-frequency = <3686400>;
213 reg-shift = <2>;
214 reg-io-width = <4>;
218 compatible = "snps,dw-apb-wdg";
220 interrupt-parent = <&vic0>;
222 bus-clock = <&pclk>, "bus";
227 rwid-axi {
228 #address-cells = <1>;
229 #size-cells = <1>;
230 compatible = "simple-bus";
234 compatible = "simple-bus";
235 #address-cells = <2>;
236 #size-cells = <1>;
244 compatible = "picochip,axi2pico-pc3x2";