Lines Matching +full:interconnect +full:-
2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
21 interrupt-parent = <&gic>;
32 compatible = "arm,cortex-a9";
35 compatible = "arm,cortex-a9";
44 compatible = "ti,omap-infra";
46 compatible = "ti,omap4-mpu";
51 compatible = "ti,omap3-c64";
62 * XXX: Use a flat representation of the OMAP4 interconnect.
63 * The real OMAP interconnect network is quite complex.
65 * MPU -+-- MPU_PRIVATE - GIC, L2
67 * +----------------+----------+
69 * + +- EMIF - DDR |
71 * | + +--------+
73 * | +- L4_ABE - AESS, MCBSP, TIMERs...
75 * +- L3_MAIN --+- L4_CORE - IPs...
77 * +- L4_PER - IPs...
79 * +- L4_CFG -+- L4_WKUP - IPs...
81 * | +- IPs...
82 * +- IPU ----+
84 * +- DSP ----+
86 * +- DSS ----+
93 compatible = "ti,omap4-l3-noc", "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
99 gic: interrupt-controller@48241000 {
100 compatible = "arm,cortex-a9-gic";
101 interrupt-controller;
102 #interrupt-cells = <1>;
108 compatible = "ti,omap4-uart";
110 clock-frequency = <48000000>;
114 compatible = "ti,omap4-uart";
116 clock-frequency = <48000000>;
120 compatible = "ti,omap4-uart";
122 clock-frequency = <48000000>;
126 compatible = "ti,omap4-uart";
128 clock-frequency = <48000000>;