networking/caif/spi_porting.txt

1 - CAIF SPI porting -
3 - CAIF SPI basics:
5 Running CAIF over SPI needs some extra setup, owing to the nature of SPI.
8 CAIF over SPI is a SPI slave chip and two GPIOs (more details below).
12 - CAIF SPI framework:
14 To make porting as easy as possible, the CAIF SPI has been divided in
16 generic functionality such as length framing, SPI frame negotiation
17 and SPI frame delivery and transmission. The other part is the CAIF
18 SPI slave device part, which is the module that you have to write if
19 you want to run SPI CAIF on a new hardware. This part takes care of
20 the physical hardware, both with regard to SPI and to GPIOs.
22 - Implementing a CAIF SPI device:
24 	- Functionality provided by the CAIF SPI slave device:
26 	In order to implement a SPI device you will, as a minimum,
32 	This function is called by the CAIF SPI interface to give
37 	to map to different CAIF SPI slave devices.
41 	This function is called by the CAIF SPI interface when the output
45 	SPI slave devices.
47 	- Functionality provided by the CAIF SPI interface:
51 	This function is called by the CAIF SPI slave device in order to
56 	returned from the platform probe function in the SPI device structure.
60 	This function is called by the CAIF SPI slave device in order to
65 	returned from the platform probe function in the SPI device structure.
69 		- Filling in the SPI slave device structure:
74 		SPI slave devices).
77 		- Filling in the SPI slave platform device structure:
79 		Assign the SPI slave device structure as platform data.
83 In order to optimize throughput, a number of SPI padding options are provided.
90 - CAIF SPI device template:
130 	/* Normally the DMA or the SPI framework will call you back
133 	 * to the CAIF SPI interface. It is OK to call this function
141 	 * receive the data from the master SPI. */
154 	 * SPI. If xfer is false then you should de-assert SPI_INT to indicate
164 	 * Here you should release your SPI device resources.
170 	/* Here you should initialize your SPI device by providing the
174 	 * with the CAIF SPI interface initialized. This is probably also
175 	 * the place where you should set up your GPIOs, interrupts and SPI