Lines Matching full:a

9 A, NA (1 bit) : Accept and reverse accept bit. 
11                 get a 10 bit I2C address.
12 Comm  (8 bits): Command byte, a data byte which often selects a register on
14 Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
16 Count (8 bits): A data byte containing the length of a block operation.
26   S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
34   S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
42 They are just like the above transactions, but instead of a stop bit P
43 a start bit S is sent and the transaction continues. An example of
44 a byte read, followed by a byte write:
46   S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
55     In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
58       S Addr Rd [A] [Data] NA Data [A] P
64     This toggles the Rd/Wr flag. That is, if you want to do a write, but
65     need to emit an Rd instead of a Wr, or vice versa, you set this
67       S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
71     client. Setting this flag treats any [NA] as [A], and all of
76     In a read message, master A/NA bit is skipped.