powerpc/fsl/srio.txt

3 RapidIO port node:
5    - compatible
11 	Optionally, a compatiable string of "fsl,srio-vX.Y" where X is Major
15    - reg
17 	Value type: <prop-encoded-array>
18 	Definition: A standard property.  Specifies the physical address and
22    - interrupts
24 	Value type: <prop_encoded-array>
26 		value of the interrupts property consists of one interrupt
28 		binding document describing the node's interrupt parent.
30 		A single IRQ that handles error conditions is specified by this
31 		property.  (Typically shared with port-write).
33    - fsl,srio-rmu-handle:
34 	Usage: required if rmu node is defined
36 	Definition: A single <phandle> value that points to the RMU.
37 	(See srio-rmu.txt for more details on RMU node binding)
39 Port Child Nodes:  There should a port child node for each port that exists in
43    - cell-index
46 	Definition: A standard property.  Matches the port id.
48    - ranges
50 	Value type: <prop-encoded-array>
51 	Definition: A standard property. Utilized to describe the memory mapped
56    - fsl,liodn
57 	Usage: optional-but-recommended (for devices with PAMU)
58 	Value type: <prop-encoded-array>
60 		correctly configured for SRIO accesses.  The property should
63 		For HW (ie, the P4080) that only supports a LIODN for both
64 		memory and maintenance transactions then a single LIODN is
65 		represented in the property for both transactions.
68 		memory transactions and a unique LIODN for maintenance
69 		transactions then a pair of LIODNs are represented in the
70 		property.  Within the pair, the first element represents the
80 		#address-cells = <2>;
81 		#size-cells = <2>;
85 		fsl,srio-rmu-handle = <&rmu>;
89 			cell-index = <1>;
90 			#address-cells = <2>;
91 			#size-cells = <2>;
97 			cell-index = <2>;
98 			#address-cells = <2>;
99 			#size-cells = <2>;