powerpc/fsl/dma.txt

1 * Freescale 83xx DMA Controller
7 - compatible        : compatible list, contains 2 entries, first is
8 		 "fsl,CHIP-dma", where CHIP is the processor
10 		 "fsl,elo-dma"
11 - reg               : <registers mapping for DMA general status reg>
12 - ranges		: Should be defined as specified in 1) to describe the
13 		  DMA controller channels.
14 - cell-index        : controller index.  0 for controller @ 0x8100
15 - interrupts        : <interrupt mapping for DMA IRQ>
16 - interrupt-parent  : optional, if needed for interrupt mapping
19 - DMA channel nodes:
20         - compatible        : compatible list, contains 2 entries, first is
21 			 "fsl,CHIP-dma-channel", where CHIP is the processor
23 			 "fsl,elo-dma-channel". However, see note below.
24         - reg               : <registers mapping for channel>
25         - cell-index        : dma channel index starts at 0.
28         - interrupts        : <interrupt mapping for DMA channel IRQ>
31         - interrupt-parent  : optional, if needed for interrupt mapping
35 		#address-cells = <1>;
36 		#size-cells = <1>;
37 		compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
40 		interrupt-parent = <&ipic>;
42 		cell-index = <0>;
43 		dma-channel@0 {
44 			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 			cell-index = <0>;
47 			interrupt-parent = <&ipic>;
50 		dma-channel@80 {
51 			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
52 			cell-index = <1>;
54 			interrupt-parent = <&ipic>;
57 		dma-channel@100 {
58 			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
59 			cell-index = <2>;
61 			interrupt-parent = <&ipic>;
64 		dma-channel@180 {
65 			compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
66 			cell-index = <3>;
68 			interrupt-parent = <&ipic>;
73 * Freescale 85xx/86xx DMA Controller
79 - compatible        : compatible list, contains 2 entries, first is
80 		 "fsl,CHIP-dma", where CHIP is the processor
82 		 "fsl,eloplus-dma"
83 - reg               : <registers mapping for DMA general status reg>
84 - cell-index        : controller index.  0 for controller @ 0x21000,
85                                          1 for controller @ 0xc000
86 - ranges		: Should be defined as specified in 1) to describe the
87 		  DMA controller channels.
89 - DMA channel nodes:
90         - compatible        : compatible list, contains 2 entries, first is
91 			 "fsl,CHIP-dma-channel", where CHIP is the processor
93 			 "fsl,eloplus-dma-channel". However, see note below.
94         - cell-index        : dma channel index starts at 0.
95         - reg               : <registers mapping for channel>
96         - interrupts        : <interrupt mapping for DMA channel IRQ>
97         - interrupt-parent  : optional, if needed for interrupt mapping
101 		#address-cells = <1>;
102 		#size-cells = <1>;
103 		compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
106 		cell-index = <0>;
107 		dma-channel@0 {
108 			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
110 			cell-index = <0>;
111 			interrupt-parent = <&mpic>;
114 		dma-channel@80 {
115 			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
117 			cell-index = <1>;
118 			interrupt-parent = <&mpic>;
121 		dma-channel@100 {
122 			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
124 			cell-index = <2>;
125 			interrupt-parent = <&mpic>;
128 		dma-channel@180 {
129 			compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
131 			cell-index = <3>;
132 			interrupt-parent = <&mpic>;
138 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
142 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel".  For the SSI drivers, for
143 example, the compatible property should be "fsl,ssi-dma-channel".  See ssi.txt