devicetree/bindings/marvell.txt

1 Marvell Discovery mv64[345]6x System Controller chips
4 The Marvell mv64[345]60 series of system controller chips contain
7 the system controller chip itself and each of the peripherals
11 1) The /system-controller node
13   This node is used to represent the system-controller and must be
14   present when the system uses a system controller chip. The top-level
15   system-controller node contains information that is global to all
16   devices within the system controller chip. The node name begins
17   with "system-controller" followed by the unit address, which is
18   the base address of the memory-mapped register set for the system
19   controller chip.
23     - ranges : Describes the translation of system controller addresses
25     - clock-frequency: Contains the main clock frequency for the system
26       controller chip.
27     - reg : This property defines the address and size of the
28       memory-mapped registers contained within the system controller
30       the unit address of the system-controller node.
31     - #address-cells : Address representation for system controller
33       represent the address of the memory-mapped registers of devices
34       within the system controller chip.
35     - #size-cells : Size representation for the memory-mapped
36       registers within the system controller chip.
37     - #interrupt-cells : Defines the width of cells used to represent
42     - model : The specific model of the system controller chip.  Such
44     - compatible : A string identifying the compatibility identifiers
45       of the system controller chip.
47   The system-controller node contains child nodes for each system
48   controller device that the platform uses.  Nodes should not be created
49   for devices which exist on the system controller chip but are not used
51   Example Marvell Discovery mv64360 system-controller node:
53     system-controller@f1000000 { /* Marvell Discovery mv64360 */
54 	    #address-cells = <1>;
55 	    #size-cells = <1>;
58 	    clock-frequency = <133333333>;
60 	    virtual-reg = <0xf1000000>;
70 2) Child nodes of /system-controller
80      - #address-cells : Should be <1>
81      - #size-cells : Should be <0>
82      - device_type : Should be "mdio"
83      - compatible : Should be "marvell,mv64360-mdio"
88 	     #address-cells = <1>;
89 	     #size-cells = <0>;
91 	     compatible = "marvell,mv64360-mdio";
93 	     ethernet-phy@0 {
99    b) Marvell Discovery ethernet controller
101    The Discover ethernet controller is described with two levels
106    of registers.  The "ethernet-block" level describes the
108    port-specific properties.
113      - #address-cells : <1>
114      - #size-cells : <0>
115      - compatible : "marvell,mv64360-eth-block"
116      - reg : Offset and length of the register set for this block
119      ethernet-block@2000 {
120 	     #address-cells = <1>;
121 	     #size-cells = <0>;
122 	     compatible = "marvell,mv64360-eth-block";
132      - device_type : Should be "network".
133      - compatible : Should be "marvell,mv64360-eth".
134      - reg : Should be <0>, <1>, or <2>, according to which registers
136      - interrupts : <a> where a is the interrupt number for the port.
137      - interrupt-parent : the phandle for the interrupt controller
139      - phy : the phandle for the PHY connected to this ethernet
140        controller.
141      - local-mac-address : 6 bytes, MAC address
146 	     compatible = "marvell,mv64360-eth";
149 	     interrupt-parent = <&PIC>;
151 	     local-mac-address = [ 00 00 00 00 00 00 ];
159      - device_type : Should be "ethernet-phy"
160      - interrupts : <a> where a is the interrupt number for this phy.
161      - interrupt-parent : the phandle for the interrupt controller that
163      - reg : The ID number for the phy, usually a small integer
166      ethernet-phy@1 {
167 	     device_type = "ethernet-phy";
170 	     interrupt-parent = <&PIC>;
181      - compatible : "marvell,mv64360-sdma"
182      - reg : Offset and length of the register set for this device
183      - interrupts : <a> where a is the interrupt number for the DMA
185      - interrupt-parent : the phandle for the interrupt controller
190 	     compatible = "marvell,mv64360-sdma";
192 	     virtual-reg = <0xf1004000>;
194 	     interrupt-parent = <&PIC>;
204      - compatible : "marvell,mv64360-brg"
205      - reg : Offset and length of the register set for this device
206      - clock-src : A value from 0 to 15 which selects the clock
210      - clock-frequence : The frequency (in Hz) of the baud rate
212      - current-speed : The current speed setting (presumably by
217 	     compatible = "marvell,mv64360-brg";
219 	     clock-src = <8>;
220 	     clock-frequency = <133333333>;
221 	     current-speed = <9600>;
230      - reg : Offset and length of the register set for this device
243      - reg : Offset and length of the register set for this device
253    Represent the Discovery's MPSC DMA interrupt hardware registers
257      - reg : Offset and length of the register set for this device
267    Represent the Discovery's MPSC (Multiprotocol Serial Controller)
271      - device_type : "serial"
272      - compatible : "marvell,mv64360-mpsc"
273      - reg : Offset and length of the register set for this device
274      - sdma : the phandle for the SDMA node used by this port
275      - brg : the phandle for the BRG node used by this port
276      - cunit : the phandle for the CUNIT node used by this port
277      - mpscrouting : the phandle for the MPSCROUTING node used by this port
278      - mpscintr : the phandle for the MPSCINTR node used by this port
279      - cell-index : the hardware index of this cell in the MPSC core
280      - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
282      - interrupts : <a> where a is the interrupt number for the MPSC.
283      - interrupt-parent : the phandle for the interrupt controller
289 	     compatible = "marvell,mv64360-mpsc";
291 	     virtual-reg = <0xf1008000>;
297 	     cell-index = <0>;
300 	     interrupt-parent = <&PIC>;
309      - compatible : "marvell,mv64360-wdt"
310      - reg : Offset and length of the register set for this device
314 	     compatible = "marvell,mv64360-wdt";
324      - device_type : "i2c"
325      - compatible : "marvell,mv64360-i2c"
326      - reg : Offset and length of the register set for this device
327      - interrupts : <a> where a is the interrupt number for the I2C.
328      - interrupt-parent : the phandle for the interrupt controller
332 	     compatible = "marvell,mv64360-i2c";
334 	     virtual-reg = <0xf100c000>;
336 	     interrupt-parent = <&PIC>;
340    l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
345      - #interrupt-cells : <1>
346      - #address-cells : <0>
347      - compatible : "marvell,mv64360-pic"
348      - reg : Offset and length of the register set for this device
349      - interrupt-controller
353 	     #interrupt-cells = <1>;
354 	     #address-cells = <0>;
355 	     compatible = "marvell,mv64360-pic";
357 	     interrupt-controller;
366      - compatible : "marvell,mv64360-mpp"
367      - reg : Offset and length of the register set for this device
371 	     compatible = "marvell,mv64360-mpp";
381      - compatible : "marvell,mv64360-gpp"
382      - reg : Offset and length of the register set for this device
386 	     compatible = "marvell,mv64360-gpp";
395    1275-1994.  A typical value for the compatible property is
396    "marvell,mv64360-pci".
400 	     #address-cells = <3>;
401 	     #size-cells = <2>;
402 	     #interrupt-cells = <1>;
404 	     compatible = "marvell,mv64360-pci";
410 	     bus-range = <0 255>;
411 	     clock-frequency = <66000000>;
412 	     interrupt-parent = <&PIC>;
413 	     interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
414 	     interrupt-map = <
447      - compatible : "marvell,mv64360-cpu-error"
448      - reg : Offset and length of the register set for this device
449      - interrupts : the interrupt number for this device
450      - interrupt-parent : the phandle for the interrupt controller
454      cpu-error@0070 {
455 	     compatible = "marvell,mv64360-cpu-error";
458 	     interrupt-parent = <&PIC>;
462    q) Marvell Discovery SRAM Controller nodes
464    Represent the Discovery's SRAM controller device.
467      - compatible : "marvell,mv64360-sram-ctrl"
468      - reg : Offset and length of the register set for this device
469      - interrupts : the interrupt number for this device
470      - interrupt-parent : the phandle for the interrupt controller
473    Example Discovery SRAM Controller node:
474      sram-ctrl@0380 {
475 	     compatible = "marvell,mv64360-sram-ctrl";
478 	     interrupt-parent = <&PIC>;
487      - compatible : "marvell,mv64360-pci-error"
488      - reg : Offset and length of the register set for this device
489      - interrupts : the interrupt number for this device
490      - interrupt-parent : the phandle for the interrupt controller
494      pci-error@1d40 {
495 	     compatible = "marvell,mv64360-pci-error";
498 	     interrupt-parent = <&PIC>;
502    s) Marvell Discovery Memory Controller nodes
504    Represent the Discovery's memory controller device.
507      - compatible : "marvell,mv64360-mem-ctrl"
508      - reg : Offset and length of the register set for this device
509      - interrupts : the interrupt number for this device
510      - interrupt-parent : the phandle for the interrupt controller
513    Example Discovery Memory Controller node:
514      mem-ctrl@1400 {
515 	     compatible = "marvell,mv64360-mem-ctrl";
518 	     interrupt-parent = <&PIC>;