Lines Matching refs:clr

130 	if (!(ctrl_pin_rev.clr & PIN_PREEMPT)) {  in preemption_timer_init()
139 if (!(ctrl_exit_rev.clr & EXI_SAVE_PREEMPT)) in preemption_timer_init()
148 if (ctrl_exit_rev.clr & EXI_SAVE_PREEMPT) { in preemption_timer_main()
220 EXI_SAVE_PREEMPT) & ctrl_exit_rev.clr; in preemption_timer_exit_handler()
310 if (!(ctrl_exit_rev.clr & EXI_SAVE_PAT) && in test_ctrl_pat_init()
311 !(ctrl_exit_rev.clr & EXI_LOAD_PAT) && in test_ctrl_pat_init()
312 !(ctrl_enter_rev.clr & ENT_LOAD_PAT)) { in test_ctrl_pat_init()
319 ctrl_ent |= ctrl_enter_rev.clr & ENT_LOAD_PAT; in test_ctrl_pat_init()
320 ctrl_exi |= ctrl_exit_rev.clr & (EXI_SAVE_PAT | EXI_LOAD_PAT); in test_ctrl_pat_init()
334 if (!(ctrl_enter_rev.clr & ENT_LOAD_PAT)) in test_ctrl_pat_main()
345 if (ctrl_enter_rev.clr & ENT_LOAD_PAT) in test_ctrl_pat_main()
358 if (!(ctrl_exit_rev.clr & EXI_SAVE_PAT)) { in test_ctrl_pat_exit_handler()
364 if (!(ctrl_exit_rev.clr & EXI_LOAD_PAT)) in test_ctrl_pat_exit_handler()
387 vmcs_write(ENT_CONTROLS, ctrl_ent & ctrl_enter_rev.clr); in test_ctrl_efer_init()
388 vmcs_write(EXI_CONTROLS, ctrl_exi & ctrl_exit_rev.clr); in test_ctrl_efer_init()
400 if (!(ctrl_enter_rev.clr & ENT_LOAD_EFER)) in test_ctrl_efer_main()
411 if (ctrl_enter_rev.clr & ENT_LOAD_EFER) in test_ctrl_efer_main()
424 if (!(ctrl_exit_rev.clr & EXI_SAVE_EFER)) { in test_ctrl_efer_exit_handler()
430 if (!(ctrl_exit_rev.clr & EXI_LOAD_EFER)) { in test_ctrl_efer_exit_handler()
928 ctrl_cpu &= ctrl_cpu_rev[0].clr; in insn_intercept_init()
946 !(ctrl_cpu_rev[0].clr & insn_table[cur_insn].flag)) || in insn_intercept_main()
948 !(ctrl_cpu_rev[1].clr & insn_table[cur_insn].flag))) { in insn_intercept_main()
1047 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in __setup_ept()
1048 !(ctrl_cpu_rev[1].clr & CPU_EPT)) { in __setup_ept()
1123 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in enable_unrestricted_guest()
1124 !(ctrl_cpu_rev[1].clr & CPU_URG) || in enable_unrestricted_guest()
1125 !(ctrl_cpu_rev[1].clr & CPU_EPT)) in enable_unrestricted_guest()
1523 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in pml_init()
1524 !(ctrl_cpu_rev[1].clr & CPU_PML)) { in pml_init()
2081 if (ctrl_cpu_rev[0].clr & CPU_SECONDARY) { in disable_rdtscp_init()
3451 TEST_ASSERT(msr.clr & mask); in test_rsvd_ctl_bit_value()
3458 if (val && (msr.clr & mask) && !(msr.set & mask)) in test_rsvd_ctl_bit_value()
3467 expected = (msr.clr & mask); in test_rsvd_ctl_bit_value()
3543 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY)) in test_secondary_processor_based_ctls()
3675 if (!(ctrl_cpu_rev[0].clr & control_bit)) in test_vmcs_addr_reference()
3678 if (!(ctrl_cpu_rev[1].clr & control_bit)) in test_vmcs_addr_reference()
3796 (ctrl_cpu_rev[1].clr & test_bits[i])) { in set_bit_pattern()
3830 if (!((ctrl_cpu_rev[0].clr & (CPU_SECONDARY | CPU_TPR_SHADOW)) == in test_apic_virtual_ctls()
3876 if (!((ctrl_cpu_rev[1].clr & apic_virt_ctls) == apic_virt_ctls)) in test_apic_virtual_ctls()
3919 if (!((ctrl_cpu_rev[1].clr & CPU_VINTD) && in test_virtual_intr_ctls()
3920 (ctrl_pin_rev.clr & PIN_EXTINT))) in test_virtual_intr_ctls()
3987 if (!((ctrl_pin_rev.clr & PIN_POST_INTR) && in test_posted_intr()
3988 (ctrl_cpu_rev[1].clr & CPU_VINTD) && in test_posted_intr()
3989 (ctrl_exit_rev.clr & EXI_INTA))) in test_posted_intr()
4237 assert(!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in test_invalid_event_injection()
4533 if (!(ctrl_cpu_rev[0].clr & CPU_TPR_SHADOW)) in test_tpr_threshold()
4549 if (!((ctrl_cpu_rev[0].clr & CPU_SECONDARY) && in test_tpr_threshold()
4550 (ctrl_cpu_rev[1].clr & (CPU_VINTD | CPU_VIRT_APIC_ACCESSES)))) in test_tpr_threshold()
4554 if (ctrl_cpu_rev[1].clr & CPU_VINTD) { in test_tpr_threshold()
4567 if (ctrl_cpu_rev[1].clr & CPU_VIRT_APIC_ACCESSES) { in test_tpr_threshold()
4582 if ((ctrl_cpu_rev[1].clr & in test_tpr_threshold()
4622 if ((ctrl_pin_rev.clr & (PIN_NMI | PIN_VIRT_NMI)) != in test_nmi_ctrls()
4655 if (!(ctrl_cpu_rev[0].clr & CPU_NMI_WINDOW)) { in test_nmi_ctrls()
4843 if (!(ctrl_cpu_rev[1].clr & CPU_URG)) in test_ept_eptp()
4888 if (!((ctrl_cpu_rev[0].clr & CPU_SECONDARY) && in test_pml()
4889 (ctrl_cpu_rev[1].clr & CPU_EPT) && (ctrl_cpu_rev[1].clr & CPU_PML))) { in test_pml()
4940 if (!((ctrl_exit_rev.clr & EXI_SAVE_PREEMPT) || in test_vmx_preemption_timer()
4941 (ctrl_pin_rev.clr & PIN_PREEMPT))) { in test_vmx_preemption_timer()
5065 if (!(ctrl_cpu_rev[0].clr & CPU_MTF)) { in vmx_mtf_test()
5168 if (!(ctrl_cpu_rev[0].clr & CPU_MTF)) { in vmx_mtf_pdpte_test()
5173 if (!(ctrl_cpu_rev[1].clr & CPU_URG)) { in vmx_mtf_pdpte_test()
6071 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY)) { in configure_apic_reg_virt_test()
6081 if (!(ctrl_cpu_rev[1].clr & CPU_VIRT_APIC_ACCESSES)) { in configure_apic_reg_virt_test()
6091 if (!(ctrl_cpu_rev[0].clr & CPU_TPR_SHADOW)) { in configure_apic_reg_virt_test()
6101 if (!(ctrl_cpu_rev[1].clr & CPU_APIC_REG_VIRT)) { in configure_apic_reg_virt_test()
6111 if (!(ctrl_cpu_rev[1].clr & CPU_VIRT_X2APIC)) { in configure_apic_reg_virt_test()
6131 return ((ctrl_cpu_rev[1].clr & CPU_APIC_REG_VIRT) && in cpu_has_apicv()
6132 (ctrl_cpu_rev[1].clr & CPU_VINTD) && in cpu_has_apicv()
6133 (ctrl_pin_rev.clr & PIN_POST_INTR)); in cpu_has_apicv()
6880 if (!(ctrl_cpu_rev[1].clr & CPU_VINTD)) { in configure_virt_x2apic_mode_test()
6941 if (!(ctrl_cpu_rev[0].clr & CPU_TPR_SHADOW)) { in virt_x2apic_mode_test()
6944 } else if (!(ctrl_cpu_rev[0].clr & CPU_MSR_BITMAP)) { in virt_x2apic_mode_test()
7251 ctrl_exit_rev.clr & EXI_LOAD_EFER, in test_host_efer()
7263 if (!(ctrl_enter_rev.clr & ENT_LOAD_EFER)) { in test_guest_efer()
7270 ctrl_enter_rev.clr & ENT_LOAD_EFER, in test_guest_efer()
7340 if (!(ctrl_exit_rev.clr & EXI_LOAD_PAT)) in test_pat()
7365 if (!(ctrl_exit_rev.clr & EXI_LOAD_PAT)) { in test_load_host_pat()
7524 if (!(ctrl_exit_rev.clr & EXI_LOAD_PERF)) { in test_load_host_perf_global_ctrl()
7541 if (!(ctrl_enter_rev.clr & ENT_LOAD_PERF)) { in test_load_guest_perf_global_ctrl()
7819 if (ctrl_enter_rev.clr & ENT_LOAD_DBGCTLS) { in test_guest_dr7()
7846 if (!(ctrl_enter_rev.clr & ENT_LOAD_PAT)) { in test_load_guest_pat()
7870 if (!(ctrl_enter_rev.clr & ENT_LOAD_BNDCFGS)) { in test_load_guest_bndcfgs()
8574 if (!(ctrl_pin_rev.clr & PIN_VIRT_NMI)) { in vmx_nmi_window_test()
8579 if (!(ctrl_cpu_rev[0].clr & CPU_NMI_WINDOW)) { in vmx_nmi_window_test()
8710 if (!(ctrl_cpu_rev[0].clr & CPU_INTR_WINDOW)) { in vmx_intr_window_test()
8862 if (!(ctrl_cpu_rev[0].clr & CPU_USE_TSC_OFFSET)) { in vmx_store_tsc_test()
8949 if (!(ctrl_pin_rev.clr & PIN_PREEMPT)) { in vmx_preemption_timer_zero_test()
9064 if (!(ctrl_pin_rev.clr & PIN_PREEMPT)) { in vmx_preemption_timer_tf_test()
9155 if (!(ctrl_pin_rev.clr & PIN_PREEMPT)) { in vmx_preemption_timer_expiry_test()
10265 if (!(ctrl_cpu_rev[0].clr & CPU_SECONDARY)) { in vmx_vmcs_shadow_test()
10270 if (!(ctrl_cpu_rev[1].clr & CPU_SHADOW_VMCS)) { in vmx_vmcs_shadow_test()
10349 TEST_ASSERT(!(ctrl_cpu_rev[0].clr & CPU_SECONDARY) || in host_time_to_guest_time()
10376 if (!(ctrl_cpu_rev[0].clr & CPU_USE_TSC_OFFSET)) in rdtsc_vmexit_diff_test()
10410 if (!(ctrl_pin_rev.clr & PIN_PREEMPT)) { in invalid_msr_init()
10419 if (!(ctrl_exit_rev.clr & EXI_SAVE_PREEMPT)) in invalid_msr_init()