Lines Matching full:stage
206 report_fail("Invalid stage."); in preemption_timer_exit_handler()
243 report_fail("preemption timer with 0 value (vmcall stage 5)"); in preemption_timer_exit_handler()
247 report_fail("unexpected stage, %d", in preemption_timer_exit_handler()
585 report_fail("unexpected stage, %d", in cr_shadowing_exit_handler()
624 report_fail("unexpected stage, %d", in cr_shadowing_exit_handler()
655 // stage 0, test IO pass in iobmp_main()
761 report_fail("unexpected stage, %d", in iobmp_exit_handler()
782 report_fail("unexpected stage, %d", in iobmp_exit_handler()
1310 report_fail("unexpected stage, %d.", in pml_exit_handler()
1407 report_fail("ERROR - unexpected stage, %d.", in ept_exit_handler_common()
1426 report_fail("ERROR - unexpected stage, %d.", in ept_exit_handler_common()
1482 report_fail("ERROR : unexpected stage, %d", in ept_exit_handler_common()
2018 printf("ERROR %s: unexpected stage=%u or reason=0x%x\n", in msr_switch_exit_handler()
2037 printf("ERROR %s: unexpected stage=%u or reason=%x\n", in msr_switch_entry_failure()
9014 * Stage 2 means that we're done, one way or another. in vmx_preemption_timer_tf_test_db_handler()
9790 * have proceed as usual to next test stage as INIT in vmx_init_signal_test()