5 #define KBD_CCMD_READ_OUTPORT   0xD0    /* read output port */
6 #define KBD_CCMD_WRITE_OUTPORT  0xD1    /* write output port */
7 #define KBD_CCMD_RESET          0xFE    /* CPU reset */
11     while (inb(0x64) & 2);  in kbd_cmd()
12     outb(val, 0x64);  in kbd_cmd()
18     while (inb(0x64) & 2);  in kbd_in()
19     return inb(0x60);  in kbd_in()
25     while (inb(0x64) & 2);  in kbd_out()
26     outb(val, 0x60);  in kbd_out()
31     outb(reg, 0x70);  in rtc_out()
32     outb(val, 0x71);  in rtc_out()
37 #define state (*(volatile int *)0x2000)
38 #define bad (*(volatile int *)0x2004)
39 #define resumed (*(volatile int *)0x2008)
43 	volatile u16 *resume_vector_ptr = (u16 *)0x467L;  in main()
44 	char *addr, *resume_vec = (void*)0x1000;  in main()
47 	rtc_out(0x0f, 0x0a);  in main()
48 	resume_vector_ptr[0] = ((u32)(ulong)resume_vec);  in main()
49 	resume_vector_ptr[1] = 0;  in main()
54 	if (state != 0) {  in main()
64 		 * Port 92 bit 0 is cleared on system reset.  On a soft reset it  in main()
67 		if (resumed != 0 && (inb(0x92) & 1) == 0) {  in main()
73 	resumed = 0;  in main()
76 	case 0:  in main()
78 		outb(inb(0x92) & ~1, 0x92);  in main()
79 		outb(inb(0x92) | 1, 0x92);  in main()
93 		printf("testing 0xcf9h init... ");  in main()
94 		outb(0, 0xcf9);  in main()
95 		outb(4, 0xcf9);  in main()
101 			      | APIC_DM_INIT, 0);  in main()
118 	"incb %cs:0x2008\n"		// resumed++;
119 	"mov $0x0f, %al\n"		// rtc_out(0x0f, 0x00);
120 	"out %al, $0x70\n"
121 	"mov $0x00, %al\n"
122 	"out %al, $0x71\n"
123 	"jmp $0xffff, $0x0000\n"	// BIOS reset