Lines Matching refs:SPR_INT
107 #define SPR_INT 0x2000 /* May be updated by synchronous interrupt */ macro
122 [18] = { "DSISR", 32, OS_RW, SPR_INT, },
123 [19] = { "DAR", 64, OS_RW, SPR_INT, },
124 [26] = { "SRR0", 64, OS_RW, SPR_INT, },
125 [27] = { "SRR1", 64, OS_RW, SPR_INT, },
207 [306] = { "HDSISR", 32, HV_RW, SPR_INT, },
208 [307] = { "HDAR", 64, HV_RW, SPR_INT, },
212 [314] = { "HSRR0", 64, HV_RW, SPR_INT, },
213 [315] = { "HSRR1", 64, HV_RW, SPR_INT, },
254 [339] = { "HEIR", 32, HV_RW, SPR_INT, },
264 [339] = { "HEIR", 32, HV_RW, SPR_INT, },
266 [816] = { "ASDR", 64, HV_RW, SPR_INT, },
278 [339] = { "HEIR", 64, HV_RW, SPR_INT, },
285 [816] = { "ASDR", 64, HV_RW, SPR_INT, },