kvm-unit-tests/powerpc/sprs.c

99 #define OS_RW		0x330  macro
122  [18] = { "DSISR",	32,	OS_RW,		SPR_INT, },
123  [19] = { "DAR",	64,	OS_RW,		SPR_INT, },
124  [26] = { "SRR0",	64,	OS_RW,		SPR_INT, },
125  [27] = { "SRR1",	64,	OS_RW,		SPR_INT, },
128 [272] = { "SPRG0",	64,	OS_RW,		SPR_HARNESS, }, /* Interrupt stacr */
129 [273] = { "SPRG1",	64,	OS_RW,		SPR_HARNESS, }, /* Interrupt Scratch */
130 [274] = { "SPRG2",	64,	OS_RW, },
131 [275] = { "SPRG3",	64,	OS_RW, },
137  [22] = { "DEC",	32,	OS_RW,		SPR_ASYNC, },
139  [29] = { "ACCR",	64,	OS_RW, },
166 [786] = { "MMCRA",	64,	OS_RW, },
167 [787] = { "PMC1",	32,	OS_RW, },
168 [788] = { "PMC2",	32,	OS_RW, },
169 [789] = { "PMC3",	32,	OS_RW, },
170 [790] = { "PMC4",	32,	OS_RW, },
171 [791] = { "PMC5",	32,	OS_RW, },
172 [792] = { "PMC6",	32,	OS_RW, },
173 [793] = { "PMC7",	32,	OS_RW, },
174 [794] = { "PMC8",	32,	OS_RW, },
175 [795] = { "MMCR0",	64,	OS_RW, },
176 [796] = { "SIAR",	64,	OS_RW, },
177 [797] = { "SDAR",	64,	OS_RW, },
178 [798] = { "MMCR1",	64,	OS_RW, },
185  [17] = { "DSCR",	64,	OS_RW, },
186  [28] = { "CFAR",	64,	OS_RW,		SPR_ASYNC, }, /* Effectively async */
187  [29] = { "AMR",	64,	OS_RW, },
188  [61] = { "IAMR",	64,	OS_RW, },
191 [153] = { "FSCR",	64,	OS_RW, },
192 [157] = { "UAMOR",	64,	OS_RW, },
193 [159] = { "PSPB",	32,	OS_RW, },
248  [22] = { "DEC",	32,	OS_RW,		SPR_ASYNC, },
259  [22] = { "DEC",	64,	OS_RW,		SPR_ASYNC, },
260  [48] = { "PIDR",	32,	OS_RW, },
261 [144] = { "TIDR",	64,	OS_RW, },
267 [823] = { "PSSCR",	64,	OS_RW, },
273  [22] = { "DEC",	64,	OS_RW,		SPR_ASYNC, },
274  [48] = { "PIDR",	32,	OS_RW, },
281 [468] = { "HASHKEYR",	64,	OS_RW, },
286 [823] = { "PSSCR",	64,	OS_RW, },
287 [828] = { "DEXCR",	64,	OS_RW, },
305 [895] = { "WORT",	64,	OS_RW, }, /* UM says 18-bits! */
327 [784] = { "SIER",	64,	OS_RW, },
328 [785] = { "MMCR2",	64,	OS_RW, },
329 [786] = { "MMCRA",	64,	OS_RW, },
330 [787] = { "PMC1",	32,	OS_RW, },
331 [788] = { "PMC2",	32,	OS_RW, },
332 [789] = { "PMC3",	32,	OS_RW, },
333 [790] = { "PMC4",	32,	OS_RW, },
334 [791] = { "PMC5",	32,	OS_RW, },
335 [792] = { "PMC6",	32,	OS_RW, },
336 [795] = { "MMCR0",	64,	OS_RW, },
337 [796] = { "SIAR",	64,	OS_RW, },
338 [797] = { "SDAR",	64,	OS_RW, },
339 [798] = { "MMCR1",	64,	OS_RW, },
346 [752] = { "SIER2",	64,	OS_RW, },
347 [753] = { "SIER3",	64,	OS_RW, },
348 [754] = { "MMCR3",	64,	OS_RW, },