Lines Matching full:state
233 #define PCI_PM_CAP_D1 0x0200 /* D1 power state support */
234 #define PCI_PM_CAP_D2 0x0400 /* D2 power state support */
244 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
583 #define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
590 #define PCI_EXP_SLTSTA_MRLSS 0x0020 /* MRL Sensor State */
591 #define PCI_EXP_SLTSTA_PDS 0x0040 /* Presence Detect State */
593 #define PCI_EXP_SLTSTA_DLLSC 0x0100 /* Data Link Layer State Changed */
776 #define PCI_PWR_DATA_PM_SUB(x) (((x) >> 10) & 7) /* PM Sub State */
777 #define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
890 #define PCI_SRIOV_VFM 0x3c /* VF Migration State Array Offset*/
891 #define PCI_SRIOV_VFM_BIR(x) ((x) & 7) /* State BIR */
892 #define PCI_SRIOV_VFM_OFFSET(x) ((x) & ~7) /* State Offset */