kvm-unit-tests/lib/acpi.h

76 struct acpi_table_fadt {  struct
78 	u32 firmware_ctrl;	/* Physical address of FACS */
79 	u32 dsdt;		/* Physical address of DSDT */
80 	u8 model;		/* System Interrupt Model */
81 	u8 reserved1;		/* Reserved */
82 	u16 sci_int;		/* System vector of SCI interrupt */
83 	u32 smi_cmd;		/* Port address of SMI command port */
84 	u8 acpi_enable;		/* Value to write to smi_cmd to enable ACPI */
85 	u8 acpi_disable;	/* Value to write to smi_cmd to disable ACPI */
86 	u8 S4bios_req;		/* Value to write to SMI CMD to enter S4BIOS state */
87 	u8 reserved2;		/* Reserved - must be zero */
88 	u32 pm1a_evt_blk;	/* Port address of Power Mgt 1a acpi_event Reg Blk */
89 	u32 pm1b_evt_blk;	/* Port address of Power Mgt 1b acpi_event Reg Blk */
90 	u32 pm1a_cnt_blk;	/* Port address of Power Mgt 1a Control Reg Blk */
91 	u32 pm1b_cnt_blk;	/* Port address of Power Mgt 1b Control Reg Blk */
92 	u32 pm2_cnt_blk;	/* Port address of Power Mgt 2 Control Reg Blk */
93 	u32 pm_tmr_blk;		/* Port address of Power Mgt Timer Ctrl Reg Blk */
94 	u32 gpe0_blk;		/* Port addr of General Purpose acpi_event 0 Reg Blk */
95 	u32 gpe1_blk;		/* Port addr of General Purpose acpi_event 1 Reg Blk */
96 	u8 pm1_evt_len;		/* Byte length of ports at pm1_x_evt_blk */
97 	u8 pm1_cnt_len;		/* Byte length of ports at pm1_x_cnt_blk */
98 	u8 pm2_cnt_len;		/* Byte Length of ports at pm2_cnt_blk */
99 	u8 pm_tmr_len;		/* Byte Length of ports at pm_tm_blk */
100 	u8 gpe0_blk_len;	/* Byte Length of ports at gpe0_blk */
101 	u8 gpe1_blk_len;	/* Byte Length of ports at gpe1_blk */
102 	u8 gpe1_base;		/* Offset in gpe model where gpe1 events start */
103 	u8 reserved3;		/* Reserved */
104 	u16 plvl2_lat;		/* Worst case HW latency to enter/exit C2 state */
105 	u16 plvl3_lat;		/* Worst case HW latency to enter/exit C3 state */
106 	u16 flush_size;		/* Size of area read to flush caches */
107 	u16 flush_stride;	/* Stride used in flushing caches */
108 	u8 duty_offset;		/* Bit location of duty cycle field in p_cnt reg */
109 	u8 duty_width;		/* Bit width of duty cycle field in p_cnt reg */
110 	u8 day_alrm;		/* Index to day-of-month alarm in RTC CMOS RAM */
111 	u8 mon_alrm;		/* Index to month-of-year alarm in RTC CMOS RAM */
112 	u8 century;		/* Index to century in RTC CMOS RAM */
113 	u16 boot_flags;		/* IA-PC Boot Architecture Flags (see below for individual flags) */
114 	u8 reserved;		/* Reserved, must be zero */
115 	u32 flags;		/* Miscellaneous flag bits (see below for individual flags) */
116 	struct acpi_generic_address reset_register;	/* 64-bit address of the Reset register */
117 	u8 reset_value;		/* Value to write to the reset_register port to reset the system */
118 	u16 arm_boot_flags;	/* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
119 	u8 minor_revision;	/* FADT Minor Revision (ACPI 5.1) */
120 	u64 Xfacs;		/* 64-bit physical address of FACS */
121 	u64 Xdsdt;		/* 64-bit physical address of DSDT */
122 …ct acpi_generic_address xpm1a_event_block;	/* 64-bit Extended Power Mgt 1a Event Reg Blk address */
123 …ct acpi_generic_address xpm1b_event_block;	/* 64-bit Extended Power Mgt 1b Event Reg Blk address */
124 …cpi_generic_address xpm1a_control_block;	/* 64-bit Extended Power Mgt 1a Control Reg Blk address */
125 …cpi_generic_address xpm1b_control_block;	/* 64-bit Extended Power Mgt 1b Control Reg Blk address */
126 … acpi_generic_address xpm2_control_block;	/* 64-bit Extended Power Mgt 2 Control Reg Blk address */
127 …ct acpi_generic_address xpm_timer_block;	/* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
128 …uct acpi_generic_address xgpe0_block;	/* 64-bit Extended General Purpose Event 0 Reg Blk address */
129 …uct acpi_generic_address xgpe1_block;	/* 64-bit Extended General Purpose Event 1 Reg Blk address */
130 	struct acpi_generic_address sleep_control;	/* 64-bit Sleep Control register (ACPI 5.0) */
131 	struct acpi_generic_address sleep_status;	/* 64-bit Sleep Status register (ACPI 5.0) */
132 	u64 hypervisor_id;	/* Hypervisor Vendor ID (ACPI 6.0) */