58 #define ALL_SET_32		0x00000000FFFFFFFFULL  macro
62 	(__overflow_at_64bits ? ALL_SET_64 : ALL_SET_32)
75 #define PRE_OVERFLOW2_32		(ALL_SET_32 - COUNT - MARGIN)
178 	write_sysreg(ALL_SET_32, PMCNTENCLR);  in pmu_reset()
180 	write_sysreg(ALL_SET_32, PMOVSR);  in pmu_reset()
182 	write_sysreg(ALL_SET_32, PMINTENCLR);  in pmu_reset()
351 		write_sysreg(ALL_SET_32, pmovsclr_el0);  in irq_handler()
375 	write_sysreg_s(ALL_SET_32, PMCNTENCLR_EL0);  in pmu_reset()
377 	write_sysreg(ALL_SET_32, pmovsclr_el0);  in pmu_reset()
379 	write_sysreg(ALL_SET_32, pmintenclr_el1);  in pmu_reset()
494 	write_sysreg_s(ALL_SET_32, PMCNTENCLR_EL0);  in test_basic_event_count()
530 	write_sysreg(ALL_SET_32, pmovsclr_el0);  in test_basic_event_count()
534 	write_sysreg(ALL_SET_32, pmintenclr_el1);  in test_basic_event_count()
706 	uint64_t cntr1 = (ALL_SET_32 + 1) & pmevcntr_mask();  in test_chained_sw_incr()
736 	write_regn_el0(pmevcntr, 1, ALL_SET_32);  in test_chained_sw_incr()
1002 	write_sysreg(ALL_SET_32, pmovsclr_el0);  in test_overflow_interrupt()
1003 	write_sysreg(ALL_SET_32, pmintenset_el1);  in test_overflow_interrupt()