Lines Matching +full:write +full:- +full:to +full:- +full:write

1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define FPU_RESULT_PASS	(-1U)
18  * Write 8 bytes of random data in random. Returns true on success, false on
27 	"	cset %[ret], ne\n" /* RNDR sets NZCV to 0b0100 on failure */  in arch_collect_entropy()
223 	/* 128b aligned array to read data into */  in __fpuregs_testall()
226 			[0 ... ((FPU_QREG_MAX * 2) - 1)] = 0 };  in __fpuregs_testall()
262  * Write randomly sampled data into the FPU/SIMD registers.
279 	/* Write data into FPU registers */  in __fpuregs_writeall_random()
321  * This test uses two CPUs to test FPU/SIMD save/restore
332 	/* write data from CPU1 */  in fpuregs_context_switch_cpu1()
350  * This test uses two CPUs to test FPU/SIMD save/restore
362 	/* write data from CPU0 */  in fpuregs_context_switch_cpu0()
397 	// Set the SVE vector length to 128-bits  in sveregs_context_switch()