| #
a810a2de |
| 07-Dec-2008 |
blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> |
Some fixes for TCG debugging
This fixes a few things after Paul's improvements for TCG debugging:
- change TCGv_i64 field name to something different from
TCGv_i32
- fix things in tcg that
Some fixes for TCG debugging
This fixes a few things after Paul's improvements for TCG debugging:
- change TCGv_i64 field name to something different from
TCGv_i32
- fix things in tcg that the above change made visible.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5919 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
a7812ae4 |
| 17-Nov-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
de3526b2 |
| 03-Nov-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Fix rotri_i64 typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
15824571 |
| 03-Nov-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-7146
tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
f02bb954 |
| 03-Nov-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets
Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.
Signed-off-by: Aurelien Jarno <
tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets
Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
10460c8a |
| 02-Nov-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
64-bit target subfi fix.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
0045734a |
| 02-Nov-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
tcg-ops.h: add a subfi wrapper
Add a subfi (subtract from immediate) wrapper, useful for the PPC target.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.
tcg-ops.h: add a subfi wrapper
Add a subfi (subtract from immediate) wrapper, useful for the PPC target.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
6359706f |
| 02-Nov-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
tcg-ops.h: _i64 TCG immediate instructions cleanup
Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie w
tcg-ops.h: _i64 TCG immediate instructions cleanup
Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie when imm == 0) for addi_i64 and subi_64 than the
32-bit version.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5598 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
bdffd4a9 |
| 21-Oct-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
TCG: add tcg_const_local_tl()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
f24cb33e |
| 21-Oct-2008 |
aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> |
TCG: add logical operations found on alpha and powerpc processors
- andc_i32/i64 t0, t1, t2
- eqv_i32/i64 t0, t1, t2
- nand_i32/i64 t0, t1, t2
- nor_i32/i64 t0, t1, t2
- orc_i32/i64 t0, t1, t2
Sign
TCG: add logical operations found on alpha and powerpc processors
- andc_i32/i64 t0, t1, t2
- eqv_i32/i64 t0, t1, t2
- nand_i32/i64 t0, t1, t2
- nor_i32/i64 t0, t1, t2
- orc_i32/i64 t0, t1, t2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
88422e2e |
| 23-Sep-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Fix tcg_gen_concat32_i64 on 64-bit hosts.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
945ca823 |
| 21-Sep-2008 |
blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> |
Add concat32_i64 and concat_tl_i64 ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
36aa55dc |
| 21-Sep-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Add concat_i32_i64 op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
b314f270 |
| 25-May-2008 |
bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> |
suppressed unused macro handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
bcb0126f |
| 24-May-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
More TCGv type fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
cb63669a |
| 24-May-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Fix ARM conditional branch bug.
Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
e8996ee0 |
| 23-May-2008 |
bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> |
added tcg_temp_free() and improved the handling of constants
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4544 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
7e4597d7 |
| 22-May-2008 |
bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> |
added debug_insn_start debug instruction
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4531 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
34151a20 |
| 22-May-2008 |
bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> |
small shift opts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4525 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
48d38ca5 |
| 18-May-2008 |
ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> |
Switch most MIPS logical and arithmetic instructions to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
0b6ce4cf |
| 17-May-2008 |
bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> |
added not pseudo op - more _tl macros
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4468 c046a42c-6fe2-441c-8c8c-71466251a162
|
| #
390efc54 |
| 11-May-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Add TCG native negation op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
86831435 |
| 11-May-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Add zero extension (pseudo-)ops.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
98156423 |
| 10-May-2008 |
pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> |
Fix DEBUG_TCGV.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4415 c046a42c-6fe2-441c-8c8c-71466251a162
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| #
bf6247fb |
| 10-May-2008 |
blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> |
Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4412 c046a42c-6fe2-441c-8c8c-71466251a162
|