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a1f7d78e |
| 10-Aug-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add platform bus support
Add platform bus support and add the bus information such as address, size, irq number to FDT table.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> A
hw/loongarch: Add platform bus support
Add platform bus support and add the bus information such as address, size, irq number to FDT table.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220908094623.73051-5-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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3916603e |
| 30-Jul-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
Rename ls7a to virt, when it's board not chipset related.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTb
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
Rename ls7a to virt, when it's board not chipset related.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLkfO8dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9UvAgAud1jhWBalaON0be6 # tC3UMB2Xe5Dzgm5yiLC7EspHci/HB/kSqbeXY436/hbU9iBXGEZkuTeQ1BX41Aq8 # D8LBzFAr35uySD5wfZbDdpefCvuBiDcb1SMpNXLC4I3zJj0Euj96j/IewIeJfGrc # 0ZkJSq4jAOuPaU0NB1+Wmb9UsoMWhHQQOcIdz8ZpR0hjuU8yz7xAEGQosJNh/Acq # Fdm6jDCOH4KY+uw/6dKF9poeSqpBDz3rCLicNNk6D+btDQybb2NzaVHE5ApLGRbW # T0MnOf1ERoWTubAbJasKR/ODCt6Jby3kC9lZFsfOAqKjRXMYL/HexdJcM2UqKE9W # E0aFjQ== # =c3v3 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Jul 2022 05:35:59 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu: hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX' hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
74725231 |
| 29-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX'
Change macro name 'LS7A_XXX' to 'VIRT_XXX', as the loongarch virt machinue use the GPEX bridge instead of LS7A bridge. So the macro name shou
hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX'
Change macro name 'LS7A_XXX' to 'VIRT_XXX', as the loongarch virt machinue use the GPEX bridge instead of LS7A bridge. So the macro name should keep consistency.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220729073018.27037-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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68e26e1e |
| 19-Jul-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-la-20220719' of https://gitlab.com/rth7680/qemu into staging
LoongArch64 patch queue:
Add dockerfile for loongarch cross compile Add reference files for float tests. Add simple test
Merge tag 'pull-la-20220719' of https://gitlab.com/rth7680/qemu into staging
LoongArch64 patch queue:
Add dockerfile for loongarch cross compile Add reference files for float tests. Add simple tests for div, mod, clo, fclass, fcmp, pcadd Add bios and kernel boot support. Add smbios, acpi, and fdt support. Fix pch-pic update-irq. Fix some errors identified by coverity.
# gpg: Signature made Tue 19 Jul 2022 18:26:04 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-la-20220719' of https://gitlab.com/rth7680/qemu: (21 commits) hw/loongarch: Add fdt support hw/loongarch: Add acpi ged support hw/loongarch: Add smbios support hw/loongarch: Add linux kernel booting support hw/loongarch: Add uefi bios loading support hw/loongarch: Add fw_cfg table support tests/tcg/loongarch64: Add pcadd related instructions test tests/tcg/loongarch64: Add fp comparison instructions test tests/tcg/loongarch64: Add fclass test tests/tcg/loongarch64: Add div and mod related instructions test tests/tcg/loongarch64: Add clo related instructions test tests/tcg/loongarch64: Add float reference files target/loongarch: Fix float_convd/float_convs test failing fpu/softfloat: Add LoongArch specializations for pickNaN* target/loongarch/cpu: Fix cpucfg default value target/loongarch/op_helper: Fix coverity cond_at_most error target/loongarch/tlb_helper: Fix coverity integer overflow error target/loongarch/cpu: Fix coverity errors about excp_names hw/intc/loongarch_pch_pic: Fix bugs for update_irq function target/loongarch: Fix loongarch_cpu_class_by_name ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
fda3f15b |
| 12-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add fdt support
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node, pcie node into it, and create fdt rom memory region. Now fdt info is not full since only u
hw/loongarch: Add fdt support
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node, pcie node into it, and create fdt rom memory region. Now fdt info is not full since only uefi bios uses fdt, linux kernel does not use fdt. Loongarch Linux kernel uses acpi table which is full in qemu virt machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-7-yangxiaojuan@loongson.cn> [rth: Set TARGET_NEED_FDT, add fdt to meson.build] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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735143f1 |
| 12-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add acpi ged support
Loongarch virt machine uses general hardware reduces acpi method, rather than LS7A acpi device. Now only power management function is used in acpi ged device, memo
hw/loongarch: Add acpi ged support
Loongarch virt machine uses general hardware reduces acpi method, rather than LS7A acpi device. Now only power management function is used in acpi ged device, memory hotplug will be added later. Also acpi tables such as RSDP/RSDT/FADT etc.
The acpi table has submited to acpi spec, and will release soon.
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-6-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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3efa6fa1 |
| 12-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add smbios support
Add smbios support for loongarch virt machine, and put them into fw_cfg table so that bios can parse them quickly. The weblink of smbios spec: https://www.dmtf.org/d
hw/loongarch: Add smbios support
Add smbios support for loongarch virt machine, and put them into fw_cfg table so that bios can parse them quickly. The weblink of smbios spec: https://www.dmtf.org/dsp/DSP0134, the version is 3.6.0.
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-5-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
98afb0d4 |
| 12-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add uefi bios loading support
Add uefi bios loading support, now only uefi bios is porting to loongarch virt machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Sig
hw/loongarch: Add uefi bios loading support
Add uefi bios loading support, now only uefi bios is porting to loongarch virt machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
27ad7564 |
| 12-Jul-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add fw_cfg table support
Add fw_cfg table for loongarch virt machine, including memmap table.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yan
hw/loongarch: Add fw_cfg table support
Add fw_cfg table for loongarch virt machine, including memmap table.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-2-yangxiaojuan@loongson.cn> [rth: Replace fprintf with assert; drop unused return value; initialize reserved slot to zero.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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9b1f5885 |
| 06-Jun-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/qemu into staging
Initial LoongArch support.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmKeiRYdHHJpY
Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/qemu into staging
Initial LoongArch support.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmKeiRYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV85Kgf/buBy5+0y51NKOpTI # zwFzvuQoWyMwb1nz1ag3i0Sk5fk72zmQI13fwfCgyUZckT165qISa2hohnzl4zVZ # CO0uZl44makET+uqJn5h2VXSM7Wf+jv0UzbCElVQuEFt0t1bIPbco0pTx/TojBb+ # +YKN4jobvJiLVhD1wDVJqp/2r9gcnX11EWZk+ZC+pIiEqYZpWRcQdEGVh4Ymhig8 # 0LK/8HRSyw0AecX/01hcGWvYCC0ldFicwN69AD42BqM+7WD+3jnV8FJL8qqq766G # xuCNHz0eDcVgfw9bCEyhFmhgiBFvOXNCtyDOV0qVn7eee9nIrFZcsGyBqeI/T1el # e7uz8Q== # =l8TD # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Jun 2022 04:09:10 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-la-20220606' of https://gitlab.com/rth7680/qemu: (43 commits) target/loongarch: 'make check-tcg' support tests/tcg/loongarch64: Add hello/memory test in loongarch64 system target/loongarch: Add gdb support. hw/loongarch: Add LoongArch virt power manager support. hw/loongarch: Add LoongArch load elf function. hw/loongarch: Add LoongArch ls7a rtc device support hw/loongarch: Add some devices support for 3A5000. Enable common virtio pci support for LoongArch hw/loongarch: Add irq hierarchy for the system hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC) hw/loongarch: Add LoongArch ipi interrupt support(IPI) hw/loongarch: Add support loongson3 virt machine type. target/loongarch: Add timer related instructions support. target/loongarch: Add other core instructions support target/loongarch: Add TLB instruction support target/loongarch: Add LoongArch IOCSR instruction target/loongarch: Add LoongArch CSR instruction target/loongarch: Add constant timer support ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
f6783e34 |
| 06-Jun-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add LoongArch ipi interrupt support(IPI)
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loon
hw/loongarch: Add LoongArch ipi interrupt support(IPI)
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-32-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
a8a506c3 |
| 06-Jun-2022 |
Xiaojuan Yang <yangxiaojuan@loongson.cn> |
hw/loongarch: Add support loongson3 virt machine type.
Emulate a 3A5000 board use the new loongarch instruction. 3A5000 belongs to the Loongson3 series processors. The board consists of a 3A5000 cpu
hw/loongarch: Add support loongson3 virt machine type.
Emulate a 3A5000 board use the new loongarch instruction. 3A5000 belongs to the Loongson3 series processors. The board consists of a 3A5000 cpu model and the virt bridge. The host 3A5000 board is really complicated and contains many functions.Now for the tcg softmmu mode only part functions are emulated.
More detailed info you can see https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-31-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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