#
cc2722ec |
| 08-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
hw/timer/imx_epit.c: Switch to transaction-based ptimer API
Switch the imx_epit.c code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/c
hw/timer/imx_epit.c: Switch to transaction-based ptimer API
Switch the imx_epit.c code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191008171740.9679-18-peter.maydell@linaro.org
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#
b0142262 |
| 08-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
ptimer: Rename ptimer_init() to ptimer_init_with_bh()
Currently the ptimer design uses a QEMU bottom-half as its mechanism for calling back into the device model using the ptimer when the timer has
ptimer: Rename ptimer_init() to ptimer_init_with_bh()
Currently the ptimer design uses a QEMU bottom-half as its mechanism for calling back into the device model using the ptimer when the timer has expired. Unfortunately this design is fatally flawed, because it means that there is a lag between the ptimer updating its own state and the device callback function updating device state, and guest accesses to device registers between the two can return inconsistent device state.
We want to replace the bottom-half design with one where the guest device's callback is called either immediately (when the ptimer triggers by timeout) or when the device model code closes a transaction-begin/end section (when the ptimer triggers because the device model changed the ptimer's count value or other state). As the first step, rename ptimer_init() to ptimer_init_with_bh(), to free up the ptimer_init() name for the new API. We can then convert all the ptimer users away from ptimer_init_with_bh() before removing it entirely.
(Commit created with git grep -l ptimer_init | xargs sed -i -e 's/ptimer_init/ptimer_init_with_bh/' and three overlong lines folded by hand.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191008171740.9679-2-peter.maydell@linaro.org
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95a9457f |
| 16-Aug-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-include-2019-08-13-v2: (29 commits) sysemu: Split sysemu/runstate.h off sysemu/sysemu.h sysemu: Move the VMChangeStateEntry typedef to qemu/typedefs.h Include sysemu/sysemu.h a lot less Clean up inclusion of sysemu/sysemu.h numa: Move remaining NUMA declarations from sysemu.h to numa.h Include sysemu/hostmem.h less numa: Don't include hw/boards.h into sysemu/numa.h Include hw/boards.h a bit less Include hw/qdev-properties.h less Include qemu/main-loop.h less Include qemu/queue.h slightly less Include hw/hw.h exactly where needed Include qom/object.h slightly less Include exec/memory.h slightly less Include migration/vmstate.h less migration: Move the VMStateDescription typedef to typedefs.h Clean up inclusion of exec/cpu-common.h Include hw/irq.h a lot less typedefs: Separate incomplete types and function types ide: Include hw/ide/internal a bit less outside hw/ide/ ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
d6454270 |
| 12-Aug-2019 |
Markus Armbruster <armbru@redhat.com> |
Include migration/vmstate.h less
In my "build everything" tree, changing migration/vmstate.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend o
Include migration/vmstate.h less
In my "build everything" tree, changing migration/vmstate.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h).
hw/hw.h supposedly includes it for convenience. Several other headers include it just to get VMStateDescription. The previous commit made that unnecessary.
Include migration/vmstate.h only where it's still needed. Touching it now recompiles only some 1600 objects.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-16-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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64552b6b |
| 12-Aug-2019 |
Markus Armbruster <armbru@redhat.com> |
Include hw/irq.h a lot less
In my "build everything" tree, changing hw/irq.h triggers a recompile of some 5400 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h).
Include hw/irq.h a lot less
In my "build everything" tree, changing hw/irq.h triggers a recompile of some 5400 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h).
hw/hw.h supposedly includes it for convenience. Several other headers include it just to get qemu_irq and.or qemu_irq_handler.
Move the qemu_irq and qemu_irq_handler typedefs from hw/irq.h to qemu/typedefs.h, and then include hw/irq.h only where it's still needed. Touching it now recompiles only some 500 objects.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-13-armbru@redhat.com>
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#
59c58f96 |
| 12-Jun-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2019-06-11-v3: MAINTAINERS: Polish headline decorations MAINTAINERS: Improve section headlines MAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org Clean up a header guard symbols (again) Supply missing header guards Clean up a few header guard symbols scripts/clean-header-guards: Fix handling of trailing comments Normalize position of header guard Include qemu-common.h exactly where needed Include qemu/module.h where needed, drop it from qemu-common.h qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0b8fa32f |
| 23-May-2019 |
Markus Armbruster <armbru@redhat.com> |
Include qemu/module.h where needed, drop it from qemu-common.h
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts res
Include qemu/module.h where needed, drop it from qemu-common.h
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
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e678c56f |
| 22-Sep-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160922' into staging
target-arm queue: * add Cortex-A7 CPU * new ast2500 SoC model and evaluation board * palmetto-bmc: remov
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160922' into staging
target-arm queue: * add Cortex-A7 CPU * new ast2500 SoC model and evaluation board * palmetto-bmc: remove stray double assignment * aspeed: clean up RAM size handling * ptimer: framework for defining policy bits to change behaviour choices for different timer devices * ptimer: add some test cases * cadence_gem: add queue support * loader: support loading images to specified address spaces * loader: support auto-detect of ELF architecture from file * dma: xlnx-zynq-devcfg: Fix up XLNX_ZYNQ_DEVCFG_R_MAX * vmstateify ssd0323 * vmstateify ssi-sd * disas/arm.c: remove unused macros * imx: use 'const char', not 'char const'
# gpg: Signature made Thu 22 Sep 2016 18:20:22 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20160922: (36 commits) imx: Use 'const char', not 'char const' disas/arm.c: Remove unused macro definitions vmstateify ssi-sd vmstateify ssd0323 display dma: xlnx-zynq-devcfg: Fix up XLNX_ZYNQ_DEVCFG_R_MAX loader: Add AddressSpace loading support to targphys loader: Add AddressSpace loading support to uImages loader: Add AddressSpace loading support to ELFs loader: Allow a custom AddressSpace when loading ROMs loader: Use the specified MemoryRegion loader: Allow ELF loader to auto-detect the ELF arch xlnx-zynqmp: Set the number of priority queues cadence_gem: Correct indentation cadence_gem: Add queue support cadence_gem: Add support for screening cadence_gem: Add the num-priority-queues property cadence_gem: QOMify Cadence GEM tests: Add ptimer tests hw/ptimer: Suppress error messages under qtest hw/ptimer: Introduce timer policy feature ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
d675765a |
| 22-Sep-2016 |
Peter Maydell <peter.maydell@linaro.org> |
imx: Use 'const char', not 'char const'
'char const' means the same thing as 'const char', but we use the former in only a handful of places and we use the latter over six thousand times. Switch the
imx: Use 'const char', not 'char const'
'char const' means the same thing as 'const char', but we use the former in only a handful of places and we use the latter over six thousand times. Switch the imx reg_name() functions to bring them in line with everything else.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
e7ea81c3 |
| 22-Sep-2016 |
Dmitry Osipenko <digetx@gmail.com> |
hw/ptimer: Introduce timer policy feature
Some of the timer devices may behave differently from what ptimer provides. Introduce ptimer policy feature that allows ptimer users to change default and w
hw/ptimer: Introduce timer policy feature
Some of the timer devices may behave differently from what ptimer provides. Introduce ptimer policy feature that allows ptimer users to change default and wrong timer behaviour, for example to continuously trigger periodic timer when load value is equal to "0".
Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Message-id: 994cd608ec392da6e58f0643800dda595edb9d97.1473252818.git.digetx@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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776efef3 |
| 19-May-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
NEED_CPU_H cleanups, big enough to deserve their own pull request.
# gpg: Signature made Thu 19 May 2016 15:42:37 BST u
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
NEED_CPU_H cleanups, big enough to deserve their own pull request.
# gpg: Signature made Thu 19 May 2016 15:42:37 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"
* remotes/bonzini/tags/for-upstream: (52 commits) hw: clean up hw/hw.h includes hw: remove pio_addr_t cpu: move exec-all.h inclusion out of cpu.h exec: extract exec/tb-context.h hw: explicitly include qemu/log.h mips: move CP0 functions out of cpu.h arm: move arm_log_exception into .c file qemu-common: push cpu.h inclusion out of qemu-common.h acpi: do not use TARGET_PAGE_SIZE s390x: reorganize CSS bits between cpu.h and other headers dma: do not depend on kvm_enabled() gdbstub: remove unnecessary includes from gdbstub-xml.c qemu-common: stop including qemu/host-utils.h from qemu-common.h qemu-common: stop including qemu/bswap.h from qemu-common.h cpu: move endian-dependent load/store functions to cpu-all.h hw: cannot include hw/hw.h from user emulation hw: move CPU state serialization to migration/cpu.h hw: do not use VMSTATE_*TL include: poison symbols in osdep.h apic: move target-dependent definitions to cpu.h ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
03dd024f |
| 15-Dec-2015 |
Paolo Bonzini <pbonzini@redhat.com> |
hw: explicitly include qemu/log.h
Move the inclusion out of hw/hw.h, most files do not need it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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d1f87640 |
| 16-Mar-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160316-1' into staging
target-arm queue: * loader: Fix incorrect parameter name in load_image_mr() * Implement MRS (banked) an
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160316-1' into staging
target-arm queue: * loader: Fix incorrect parameter name in load_image_mr() * Implement MRS (banked) and MSR (banked) instructions * virt: Implement versioning for machine model * i.MX: some initial patches preparing for i.MX6 support * new ASPEED AST2400 SoC and palmetto-bmc machine * bcm2835: add some more raspi2 devices * sd: fix segfault running "info qtree"
# gpg: Signature made Wed 16 Mar 2016 17:42:43 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20160316-1: (21 commits) sd: Fix "info qtree" on boards with SD cards bcm2835_dma: add emulation of Raspberry Pi DMA controller bcm2835_property: implement framebuffer control/configuration properties bcm2835_fb: add framebuffer device for Raspberry Pi bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block bcm2835_peripherals: enable sdhci pending-insert quirk for raspberry pi hw/arm: Add palmetto-bmc machine hw/arm: Add ASPEED AST2400 SoC model hw/intc: Add (new) ASPEED VIC device model hw/timer: Add ASPEED timer device model i.MX: Add missing descriptions in devices. i.MX: Add i.MX6 CCM and ANALOG device. i.MX: Add the CLK_IPG_HIGH clock i.MX: Remove CCM useless clock computation handling. i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency. i.MX: Allow GPT timer to rollover. arm: virt: Move machine class init code to the abstract machine type arm: virt: Add an abstract ARM virt machine type target-arm: Fix translation level on early translation faults target-arm: Implement MRS (banked) and MSR (banked) instructions ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
d552f675 |
| 16-Mar-2016 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: Add the CLK_IPG_HIGH clock
EPIT, GPT and other i.MX timers are using "abstract" clocks among which a CLK_IPG_HIGH clock.
On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same c
i.MX: Add the CLK_IPG_HIGH clock
EPIT, GPT and other i.MX timers are using "abstract" clocks among which a CLK_IPG_HIGH clock.
On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same clock but on other SOC like i.MX6 they are mapped to distinct clocks.
This patch add the CLK_IPG_HIGH to prepare for SOC where these 2 clocks are different.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 224bf650194760284cb40630e985867e1373276a.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
c91a5883 |
| 16-Mar-2016 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.
This way all CCM clock defines/enums are named CLK_XXX
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christoph
i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.
This way all CCM clock defines/enums are named CLK_XXX
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 8537df765c1713625c7a8b9aca4c7ca60b42e0c0.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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8ef94f0b |
| 26-Jan-2016 |
Peter Maydell <peter.maydell@linaro.org> |
arm: Clean up includes
Clean up includes so that osdep.h is included first and headers which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-b
arm: Clean up includes
Clean up includes so that osdep.h is included first and headers which it implies are not included manually.
This commit was created with scripts/clean-includes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-13-git-send-email-peter.maydell@linaro.org
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e5fbe28e |
| 17-Dec-2015 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151217-1' into staging
target-arm queue: * i.MX CCM patches * support guest debug for AArch64 KVM * support power button on v
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151217-1' into staging
target-arm queue: * i.MX CCM patches * support guest debug for AArch64 KVM * support power button on virt board via GPIO * clean up AArch32 singlestep code * raise exception on misaligned LDREX operands * soc-dma: use hwaddr instead of target_ulong in printf * explicitly mark some ARM device loads as little-endian * i.MX: add support for lower and upper interrupt in GPIO
# gpg: Signature made Thu 17 Dec 2015 13:38:09 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20151217-1: (25 commits) i.MX: Add an i.MX25 specific CCM class/instance i.MX: Split the CCM class into an abstract base class and a concrete class i.MX: rename i.MX CCM get_clock() function and CLK ID enum names i.MX: Fix i.MX31 default/reset configuration tests/guest-debug: introduce basic gdbstub tests target-arm: kvm - re-inject guest debug exceptions target-arm: kvm - add support for HW assisted debug target-arm: kvm - support for single step target-arm: kvm - implement software breakpoints target-arm: kvm64 - introduce kvm_arm_init_debug() ARM: Virt: Add gpio-keys node for Poweroff using DT ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3 ARM: ACPI: Add _E03 for Power Button ACPI: Add aml_gpio_int() wrapper for GPIO Interrupt Connection ACPI: Add GPIO Connection Descriptor ARM: ACPI: Add power button device in ACPI DSDT table ARM: ACPI: Add GPIO controller in ACPI DSDT table ARM: Virt: Add a GPIO controller acpi: extend aml_interrupt() to support multiple irqs acpi: support serialized method ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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aaa9ec3b |
| 17-Dec-2015 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: rename i.MX CCM get_clock() function and CLK ID enum names
This is to prepare for CCM code refactoring.
This is just a bit of function and enum values renaming.
We also remove some useless i
i.MX: rename i.MX CCM get_clock() function and CLK ID enum names
This is to prepare for CCM code refactoring.
This is just a bit of function and enum values renaming.
We also remove some useless intermediate variables.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 53c4d9b9611988a5f56f178f285e04490747925e.1449528242.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c012e1b7 |
| 27-Oct-2015 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151027-1' into staging
target-arm queue: * more EL2 preparation: handling for stage 2 translations * standardize debug macros
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151027-1' into staging
target-arm queue: * more EL2 preparation: handling for stage 2 translations * standardize debug macros in i.MX devices * improve error message in a corner case for virt board * disable live migration of KVM GIC if the kernel can't handle it * add SPSR_(ABT|UND|IRQ|FIQ) registers * handle non-executable page-straddling Thumb instructions * fix a "no 64-bit EL2" assumption in arm_excp_unmasked()
# gpg: Signature made Tue 27 Oct 2015 16:03:31 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20151027-1: (27 commits) target-arm: Add support for S1 + S2 MMU translations target-arm: Route S2 MMU faults to EL2 target-arm: Add S2 translation to 32bit S1 PTWs target-arm: Add S2 translation to 64bit S1 PTWs target-arm: Add ARMMMUFaultInfo target-arm: Avoid inline for get_phys_addr target-arm: Add support for S2 page-table protection bits target-arm: Add computation of starting level for S2 PTW target-arm: lpae: Rename granule_sz to stride target-arm: lpae: Replace tsz with computed inputsize target-arm: Add support for AArch32 S2 negative t0sz target-arm: lpae: Move declaration of t0sz and t1sz target-arm: lpae: Make t0sz and t1sz signed integers target-arm: Add HPFAR_EL2 i.MX: Standardize i.MX GPT debug i.MX: Standardize i.MX EPIT debug i.MX: Standardize i.MX FEC debug i.MX: Standardize i.MX CCM debug i.MX: Standardize i.MX AVIC debug i.MX: Standardize i.MX I2C debug ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
4929f656 |
| 25-Oct-2015 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: Standardize i.MX EPIT debug
The goal is to have debug code always compiled during build.
We standardize all debug output on the following format:
[QOM_TYPE_NAME]reporting_function: debug mes
i.MX: Standardize i.MX EPIT debug
The goal is to have debug code always compiled during build.
We standardize all debug output on the following format:
[QOM_TYPE_NAME]reporting_function: debug message
We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output is following the same format as the above debug.
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 5bbad71517ca728d8865f7b9f998baa0df022794.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
298fae38 |
| 07-Sep-2015 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150907' into staging
target-arm queue: * cleanup to use g_new() and friends * support semihosting in A64 * add SMBIOS support
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150907' into staging
target-arm queue: * cleanup to use g_new() and friends * support semihosting in A64 * add SMBIOS support to mach-virt * remove hw_error() usages * fix bug in the AArch32:AArch64 register mapping * add a second PCI memory window in highmem on virt board * fix bug in arm_excp_unmasked() * add i.MX31 SoC * remove restriction on handling affinity values in virt board
# gpg: Signature made Mon 07 Sep 2015 10:40:48 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20150907: (27 commits) arm/virt: Add full-sized CPU affinity handling target-arm: Refactor CPU affinity handling i.MX: Add i2C devices to i.MX31 SOC i.MX: Add qtest support for I2C device emulator. i.MX: Add the i.MX25 PDK platform i.MX: Add SOC support for i.MX25 i.MX: Add FEC Ethernet Emulator i.MX: Add I2C controller emulator i.MX: KZM: use standalone i.MX31 SOC support i.MX: Add SOC support for i.MX31 target-arm: Fix arm_excp_unmasked() function hw/arm/virt: Add high MMIO PCI region, 512G in size target-arm: Fix AArch32:AArch64 general-purpose register mapping arm: Remove hw_error() usages. arm: cpu: assert() on no-EL2 virt IRQ error condition. smbios: implement smbios support for mach-virt smbios: add smbios 3.0 support target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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f044ac49 |
| 07-Sep-2015 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: KZM: use standalone i.MX31 SOC support
Convert the KZM board to use the i.MX31 SoC defintition instead of redefining the entire SoC on the machine level. Major rewrite of the machine init code
i.MX: KZM: use standalone i.MX31 SOC support
Convert the KZM board to use the i.MX31 SoC defintition instead of redefining the entire SoC on the machine level. Major rewrite of the machine init code.
While touching the memory map comment de-indent to the correct level of indentation.
This obsoletes the legacy i.MX device device creation helpers which are removed.
Tested by booting a minimal Linux system on the emulated platform
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 5e783561f092e1c939562fdff001f1ab1194b07f.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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425591e3 |
| 13-Aug-2015 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150813' into staging
target-arm queue: * i.MX code cleanup/refactorings * i.MX UART fix to work with uninitialized chardev *
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150813' into staging
target-arm queue: * i.MX code cleanup/refactorings * i.MX UART fix to work with uninitialized chardev * minor GIC code refactorings * implement the ARM Secure physical timer * implement the ARM Hypervisor timer
# gpg: Signature made Thu 13 Aug 2015 11:40:56 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20150813: (27 commits) i.MX: Fix UART driver to work with unitialized "chardev" device hw/cpu/a15mpcore: Wire up hyp and secure physical timer interrupts hw/arm/virt: Wire up secure timer interrupt target-arm: Add AArch32 banked register access to secure physical timer target-arm: Add the AArch64 view of the Secure physical timer target-arm: Add debug check for mismatched cpreg resets Introduce gic_class_name() instead of repeating condition hw/arm/gic: Kill code duplication Merge memory_region_init_reservation() into memory_region_init_io() i.MX: Fix Coding style for GPT emulator i.MX: Split GPT emulator in a header file and a source file i.MX: Fix Coding style for EPIT emulator i.MX: Split EPIT emulator in a header file and a source file i.MX: Fix Coding style for CCM emulator i.MX: Split CCM emulator in a header file and a source file i.MX: Fix Coding style for AVIC emulator. i.MX: Split AVIC emulator in a header file and a source file i.MX:Fix Coding style for UART emulator. i.MX: Move serial initialization to init/realize of DeviceClass. i.MX: Split UART emulator in a header file and a source file ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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565328fc |
| 13-Aug-2015 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: Fix Coding style for EPIT emulator
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: d8d70683c6a48ac318c16355
i.MX: Fix Coding style for EPIT emulator
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: d8d70683c6a48ac318c1635595619cfb0eb31681.1437080501.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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951cd00e |
| 13-Aug-2015 |
Jean-Christophe Dubois <jcd@tribudubois.net> |
i.MX: Split EPIT emulator in a header file and a source file
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 948
i.MX: Split EPIT emulator in a header file and a source file
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 948927cab0c85da9a753c5f6d5501323d5604c8e.1437080501.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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