#
063cb7cb |
| 27-Apr-2017 |
Sam Bobroff <sam.bobroff@au1.ibm.com> |
ppc/xics: Fix stale irq->status bits after get
ics_get_kvm_state() "or"s set bits into irq->status but does not mask out clear bits.
Correct this by initializing the IRQ status to zero before addin
ppc/xics: Fix stale irq->status bits after get
ics_get_kvm_state() "or"s set bits into irq->status but does not mask out clear bits.
Correct this by initializing the IRQ status to zero before adding bits to it.
Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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56b51708 |
| 06-Mar-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170306' into staging
ppc patch queue for 2017-03-06
Looks like my previous batch wasn't quite the last before hard freeze. This has
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170306' into staging
ppc patch queue for 2017-03-06
Looks like my previous batch wasn't quite the last before hard freeze. This has a handful of bugfixes to go in. They're all genuine bugfixes, though not regressions in some cases.
# gpg: Signature made Mon 06 Mar 2017 04:07:48 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.9-20170306: target/ppc: use helper for excp handling target/ppc: fmadd: add macro for updating flags target/ppc: fmadd check for excp independently spapr: ensure that all threads within core are on the same NUMA node ppc/xics: register reset handlers for the ICP and ICS objects
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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7ea6e067 |
| 03-Mar-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: register reset handlers for the ICP and ICS objects
The recent changes on the XICS layer removed the XICSState object to let the sPAPR machine handle the ICP and ICS directly. The reset of
ppc/xics: register reset handlers for the ICP and ICS objects
The recent changes on the XICS layer removed the XICSState object to let the sPAPR machine handle the ICP and ICS directly. The reset of these objects was previously handled by XICSState, which was a SysBus device, and to keep the same behavior, the ICP and ICS were assigned to SysbBus.
But that broke the 'info qtree' command in the monitor. 'qtree' performs a loop on the children of a bus to print their properties and SysBus devices are expected to be found under SysBus, which is not the case anymore.
The fix for this problem is to register reset handlers for the ICP and ICS objects and stop using SysBus for such devices.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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ab711e21 |
| 02-Mar-2017 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170301' into staging
ppc patch queue for 2017-03-01
I was hoping to get this pull request squeezed in before the soft freeze, but I
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170301' into staging
ppc patch queue for 2017-03-01
I was hoping to get this pull request squeezed in before the soft freeze, but I ran into some difficulties during testing. Everything here was at least posted before the soft freeze, so I'm hoping we can still merge it for 2.9.
The biggest things here are: * Cleanups to handling of hashed page tables, that will make adding support for the POWER9 MMU easier * Cleanups to the XICS interrupt controller that will make implementing the powernv machine easier * TCG implementation of extended overflow and carry handling for POWER9
It also includes: * Increasing the CPU limit for pseries to 1024 vCPUs * Generating proper OF node names in qemu (making hotplug and coldplug logic closer together)
# gpg: Signature made Wed 01 Mar 2017 04:43:06 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.9-20170301: (50 commits) Add PowerPC 32-bit guest memory dump support ppc/xics: rename 'ICPState *' variables to 'icp' ppc/xics: move InterruptStatsProvider to the sPAPR machine ppc/xics: move ics-simple post_load under the machine ppc/xics: remove the XICSState classes ppc/xics: export the XICS init routines ppc/xics: move the ICP array under the sPAPR machine ppc/xics: register the reset handler of ICP objects ppc/xics: simplify spapr_dt_xics() interface ppc/xics: use the QOM interface to grab an ICP ppc/xics: move the cpu_setup() handler under the ICPState class ppc/xics: simplify the cpu_setup() handler ppc/xics: move kernel_xics_fd out of KVMXICSState ppc/xics: extend the QOM interface to handle ICPs ppc/xics: remove the XICS list of ICS ppc/xics: register the reset handler of ICS objects ppc/xics: remove xics_find_source() ppc/xics: use the QOM interface to resend irqs ppc/xics: use the QOM interface to get irqs ppc/xics: use the QOM interface under the sPAPR machine ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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8e4fba20 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: rename 'ICPState *' variables to 'icp'
'ICPState *' variables are currently named 'ss'. This is confusing, so let's give them an appropriate name: 'icp'.
Signed-off-by: Cédric Le Goater <
ppc/xics: rename 'ICPState *' variables to 'icp'
'ICPState *' variables are currently named 'ss'. This is confusing, so let's give them an appropriate name: 'icp'.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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e6f7e110 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: remove the XICSState classes
The XICSState classes are not used anymore. They have now been fully deprecated by the XICSFabric QOM interface. Do the cleanups.
Signed-off-by: Cédric Le Goa
ppc/xics: remove the XICSState classes
The XICSState classes are not used anymore. They have now been fully deprecated by the XICSFabric QOM interface. Do the cleanups.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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2192a930 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: export the XICS init routines
There is nothing left related to the XICS object in the realize functions of the KVMXICSState and XICSState class. So adapt the interfaces to call these routi
ppc/xics: export the XICS init routines
There is nothing left related to the XICS object in the realize functions of the KVMXICSState and XICSState class. So adapt the interfaces to call these routines directly from the sPAPR machine init sequence.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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f0232434 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: move the cpu_setup() handler under the ICPState class
The cpu_setup() handler is currently under the XICSState class but it really belongs under ICPState as it is setting up an individual
ppc/xics: move the cpu_setup() handler under the ICPState class
The cpu_setup() handler is currently under the XICSState class but it really belongs under ICPState as it is setting up an individual vCPU.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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bf50860d |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: simplify the cpu_setup() handler
The cpu_setup() handler currently takes a 'XICSState *' argument to grab the kernel ICP file descriptor. This interface can be simplified by using the 'xic
ppc/xics: simplify the cpu_setup() handler
The cpu_setup() handler currently takes a 'XICSState *' argument to grab the kernel ICP file descriptor. This interface can be simplified by using the 'xics' backlink of the ICP object.
This change is also required by subsequent patches which makes use of the QOM interface for XICS.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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#
729f8a4f |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: move kernel_xics_fd out of KVMXICSState
The kernel ICP file descriptor is the only reason behind the KVMXICSState class and it's in the way of more cleanups. Let's make it a static for the
ppc/xics: move kernel_xics_fd out of KVMXICSState
The kernel ICP file descriptor is the only reason behind the KVMXICSState class and it's in the way of more cleanups. Let's make it a static for the moment and move forward.
If this is problem, we could use an attribute under the sPAPR machine later on.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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817bb6a4 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: remove set_nr_servers() handler from XICSStateClass
Today, the ICP (Interrupt Controller Presenter) objects are created by the 'nr_servers' property handler of the XICS object and a class
ppc/xics: remove set_nr_servers() handler from XICSStateClass
Today, the ICP (Interrupt Controller Presenter) objects are created by the 'nr_servers' property handler of the XICS object and a class handler. They are realized in the XICS object realize routine.
Let's simplify the process by creating the ICP objects along with the XICS object at the machine level.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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4e4169f7 |
| 27-Feb-2017 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: remove set_nr_irqs() handler from XICSStateClass
Today, the ICS (Interrupt Controller Source) object is created and realized by the init and realize routines of the XICS object, but some o
ppc/xics: remove set_nr_irqs() handler from XICSStateClass
Today, the ICS (Interrupt Controller Source) object is created and realized by the init and realize routines of the XICS object, but some of the parameters are only known at the machine level.
These parameters are passed from the sPAPR machine to the ICS object in a rather convoluted way using property handlers and a class handler of the XICS object. The number of irqs required to allocate the IRQ state objects in the ICS realize routine is one of them.
Let's simplify the process by creating the ICS object along with the XICS object at the machine level and link the ICS into the XICS list of ICSs at this level also. In the sPAPR machine, there is only a single ICS but that will change with the PowerNV machine.
Also, QOMify the creation of the objects and get rid of the superfluous code.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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#
66a77ea6 |
| 28-Oct-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161028' into staging
ppc patch queue 2016-10-28
This pull request supersedes and extends the one from 2016-10-26 (which had a build
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161028' into staging
ppc patch queue 2016-10-28
This pull request supersedes and extends the one from 2016-10-26 (which had a build bug).
Highlights: * SLOF (pseries guest firmware) update * Enable a number of extra testcases on ppc / pseries * Added the 'powernv' machine type - Almost enough to be minimally usable - But still missing necessary interrupt controller updates * Cleanup and consolidation of NVRAM handling on several platforms with related firmware * Substantial cleanup to device tree construction * Some more POWER9 instruction emulation * Cleanup to handling of pseries option vectors and CAS reboot handling (host/guest feature negotiation mechanism) * Significant cleanups to handling of PCI devices in test cases * New hotplug event infrastructure * Memory hot unplug support for pseries * Several bug fixes
The NVRAM cleanup affects some Sun sparc platforms as well as ppc ones, but have been tested by the sparc maintainer (Mark Cave-Ayland).
The test additions also include substantial general changes to the test framework that aren't strictly ppc related. They don't seem to break tests on other platforms, they're for the benefit of enabling tests on ppc and there isn't a specific maintainer for them, so they're included in this tree.
# gpg: Signature made Fri 28 Oct 2016 02:37:19 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.8-20161028: (73 commits) ppc: allow certain HV interrupts to be delivered to guests spapr: Memory hot-unplug support spapr: use count+index for memory hotplug spapr: Add DRC count indexed hotplug identifier type spapr: add hotplug interrupt machine options spapr_events: add support for dedicated hotplug event source spapr: update spapr hotplug documentation target-ppc: Add xvcmpnesp, xvcmpnedp instructions target-ppc: add xscmp[eq,gt,ge,ne]dp instructions tests: Add pseries machine to the prom-env-test, too spapr_nvram: Pre-initialize the NVRAM to support the -prom-env parameter libqos: Change PCI accessors to take opaque BAR handle tests: Don't assume structure of PCI IO base in ahci-test tests: Use qpci_mem{read,write} in ivshmem-test libqos: Add 64-bit PCI IO accessors tests: Clean up IO handling in ide-test libqos: Implement mmio accessors in terms of mem{read,write} libqos: Add streaming accessors for PCI MMIO tests: Adjust tco-test to use qpci_legacy_iomap() libqos: Better handling of PCI legacy IO ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2bb0d10a |
| 18-Oct-2016 |
Cédric Le Goater <clg@kaod.org> |
ppc/xics: add a xics_set_nr_servers common routine
xics_spapr and xics_kvm nearly define the same 'set_nr_servers' handler. Only the type of the ICP differs. So let's make a common one to remove som
ppc/xics: add a xics_set_nr_servers common routine
xics_spapr and xics_kvm nearly define the same 'set_nr_servers' handler. Only the type of the ICP differs. So let's make a common one to remove some duplicated code.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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7bf59dfe |
| 17-Oct-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161017' into staging
ppc patch queue 2016-10-17
Highlights: * Significant rework of how PCI IO windows are placed for the
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161017' into staging
ppc patch queue 2016-10-17
Highlights: * Significant rework of how PCI IO windows are placed for the pseries machine type * A number of extra tests added for ppc * Other tests clean up / fixed * Some cleanups to the XICS interrupt controller in preparation for the 'powernv' machine type
A number of the test changes aren't strictly in ppc related code, but are included via my tree because they're primarily focused on improving test coverage for ppc.
# gpg: Signature made Mon 17 Oct 2016 03:42:41 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.8-20161017: spapr: Improved placement of PCI host bridges in guest memory map spapr_pci: Add a 64-bit MMIO window spapr: Adjust placement of PCI host bridge to allow > 1TiB RAM spapr_pci: Delegate placement of PCI host bridges to machine type libqos: Limit spapr-pci to 32-bit MMIO for now libqos: Correct error in PCI hole sizing for spapr libqos: Isolate knowledge of spapr memory map to qpci_init_spapr() ppc/xics: Split ICS into ics-base and ics class ppc/xics: Make the ICSState a list spapr: fix inheritance chain for default machine options target-ppc: implement vexts[bh]2w and vexts[bhw]2d tests/boot-sector: Increase time-out to 90 seconds tests/boot-sector: Use mkstemp() to create a unique file name tests/boot-sector: Use minimum length for the Forth boot script qtest: ask endianness of the target in qtest_init() tests: minor cleanups in usb-hcd-uhci-test
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d4d7a59a |
| 03-Oct-2016 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
ppc/xics: Split ICS into ics-base and ics class
The existing implementation remains same and ics-base is introduced. The type name "ics" is retained, and all the related functions renamed as ics_sim
ppc/xics: Split ICS into ics-base and ics class
The existing implementation remains same and ics-base is introduced. The type name "ics" is retained, and all the related functions renamed as ics_simple_*
This will allow different implementations for the source controllers such as the MSI support of PHB3 on Power8 which uses in-memory state tables for example.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ clg: added ICS_BASE_GET_CLASS and related fixes, based on : http://patchwork.ozlabs.org/patch/646010/ ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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cc706a53 |
| 03-Oct-2016 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
ppc/xics: Make the ICSState a list
Instead of an array of fixed sized blocks, use a list, as we will need to have sources with variable number of interrupts. SPAPR only uses a single entry. Native w
ppc/xics: Make the ICSState a list
Instead of an array of fixed sized blocks, use a list, as we will need to have sources with variable number of interrupts. SPAPR only uses a single entry. Native will create more. If performance becomes an issue we can add some hashed lookup but for now this will do fine.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [ move the initialization of list to xics_common_initfn, restore xirr_owner after migration and move restoring to icp_post_load] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> [ clg: removed the icp_post_load() changes from nikunj patchset v3: http://patchwork.ozlabs.org/patch/646008/ ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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59351d9b |
| 08-Sep-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20160907' into staging
ppc patch queue for 2016-Sep-7
This is my first pull request for the newly opened qemu-2.8 tree. It contains a
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20160907' into staging
ppc patch queue for 2016-Sep-7
This is my first pull request for the newly opened qemu-2.8 tree. It contains a heap of things that were too late for 2.7 and have been queued for a while. In particular: * A number of preliminary patches for the powernv machine type * A substantial cleanup of exception handling which will be necessary to support running a TCG with hypervisor facilities * A start on support for POWER9 * Some TCG implementations for new POWER9 instructions * Some TCG and related cleanups in preparation for POWER9 * Some assorted TCG optimizations * An implementation of the H_CHANGE_LOGICAL_LAN_MAC hypercall which allows the MAC address to be changed on the PAPR virtual NIC. * Add some extra test cases for several machines (this isn't strictly in the ppc code, but is most value to ppc)
NOTE: This pull request supersedes ppc-for-2.8-20160906, which had some problems. Changes: * Dropped BenH's lmw/stmw speedups, which break for qemu-system-ppc64 on BE hosts * A small fix to Thomas' serial output test to avoid a warning on the isapc machine type. * Some trivial checkpatch fixes
Note that some of the patches in this series still have large numbers of checkpatch warnings. This is because they're moving existing code that predates most of the checkpatch style conventions.
# gpg: Signature made Wed 07 Sep 2016 07:09:27 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.8-20160907: (64 commits) tests: Check serial output of firmware boot of some machines tests: Resort check-qtest entries in Makefile.include spapr: implement H_CHANGE_LOGICAL_LAN_MAC h_call ppc: Improve a few more helper flags ppc: Improve the exception helpers flags ppc: Improve flags for helpers loading/writing the time facilities ppc: Don't generate dead code on unconditional branches ppc: Stop dumping state on all exceptions in linux-user ppc: Fix catching some segfaults in user mode ppc: Fix macio ESCC legacy mapping hw/ppc: add a ppc_create_page_sizes_prop() helper routine hw/ppc: use error_report instead of fprintf ppc: Rename #include'd .c files to .inc.c target-ppc: add extswsli[.] instruction target-ppc: add vsrv instruction target-ppc: add vslv instruction target-ppc: add vcmpnez[b,h,w][.] instructions target-ppc: add vabsdu[b,h,w] instructions target-ppc: add dtstsfi[q] instructions target-ppc: implement branch-less divd[o][.] ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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1b1746a4 |
| 21-Jul-2016 |
Greg Kurz <groug@kaod.org> |
xics_kvm: drop extra checking of kernel_xics_fd
We abort a few lines above if kernel_xics_fd == -1.
This is only code cleanup.
Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson
xics_kvm: drop extra checking of kernel_xics_fd
We abort a few lines above if kernel_xics_fd == -1.
This is only code cleanup.
Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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1b756f1a |
| 01-Jul-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160701' into staging
ppc patch queue 2016-07-01
Here's the current ppc patch queue. This is a fairly large batch, containing: *
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160701' into staging
ppc patch queue 2016-07-01
Here's the current ppc patch queue. This is a fairly large batch, containing: * A number of further preliminary patches towards full hypervisor mode emulation * Some further fixes / cleanups for the recently merged device_add based CPU hotplug * Preliminary patches towards supporting a native (rather than paravirtualized) XICS device. This will be needed to emulate a physical Power machine, including hypervisor capabilities * Assorted bug fixes
# gpg: Signature made Fri 01 Jul 2016 06:56:35 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.7-20160701: (23 commits) qmp: fix spapr example of query-hotpluggable-cpus spapr: drop duplicate variable in spapr_core_release() spapr: do proper error propagation in spapr_cpu_core_realize_child() spapr: drop reference on child object during core realization spapr: Restore support for 970MP and POWER8NVL CPU cores target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso ppc/xics: Replace "icp" with "xics" in most places ppc/xics: Implement H_IPOLL using an accessor ppc/xics: Move SPAPR specific code to a separate file ppc/xics: Rename existing xics to xics_spapr ppc: Fix 64K pages support in full emulation target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb spapr: Restore support for older PowerPC CPU cores spapr: fix write-past-end-of-array error in cpu core device init code hw/ppc/spapr: Add some missing hcall function set strings ppc: Print HSRR0/HSRR1 in "info registers" ppc: LPCR is a HV resource ppc: Initial HDEC support ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is set ppc: Fix conditions for delivering external interrupts to a guest ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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27f24582 |
| 28-Jun-2016 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
ppc/xics: Replace "icp" with "xics" in most places
The "ICP" is a different object than the "XICS". For historical reasons, we have a number of places where we name a variable "icp" while it contain
ppc/xics: Replace "icp" with "xics" in most places
The "ICP" is a different object than the "XICS". For historical reasons, we have a number of places where we name a variable "icp" while it contains a XICSState pointer. There *is* an ICPState structure too so this makes the code really confusing.
This is a mechanical replacement of all those instances to use the name "xics" instead. There should be no functional change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [spapr_cpu_init has been moved to spapr_cpu_core.c, change there] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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161deaf2 |
| 28-Jun-2016 |
Benjamin Herrenschmidt <benh@kernel.crashing.org> |
ppc/xics: Rename existing xics to xics_spapr
The common class doesn't change, the KVM one is sPAPR specific. Rename variables and functions to xics_spapr.
Retain the type name as "xics" to preserve
ppc/xics: Rename existing xics to xics_spapr
The common class doesn't change, the KVM one is sPAPR specific. Rename variables and functions to xics_spapr.
Retain the type name as "xics" to preserve migration for existing sPAPR guests.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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4acc8fdf |
| 17-Jun-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160617' into staging
ppc patch queue for 2016-06-17
Here's the current accumulated set of spapr, ppc and related patches. * The bi
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160617' into staging
ppc patch queue for 2016-06-17
Here's the current accumulated set of spapr, ppc and related patches. * The big thing in here is CPU hotplug for spapr - This includes a number of acked generic changes adding new infrastructure for hotplugging cpu cores * A number of TCG bug fixes are also included * This adds a new testcase to make it harder to accidentally break Macintosh (and other openbios) platforms
# gpg: Signature made Fri 17 Jun 2016 07:35:29 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.7-20160617: spapr: implement query-hotpluggable-cpus callback hmp: Add 'info hotpluggable-cpus' HMP command QMP: Add query-hotpluggable-cpus spapr: CPU hot unplug support spapr: CPU hotplug support spapr: convert boot CPUs into CPU core devices spapr: Move spapr_cpu_init() to spapr_cpu_core.c spapr: Abstract CPU core device and type specific core devices qom: API to get instance_size of a type spapr_drc: Prevent detach racing against attach for CPU DR xics,xics_kvm: Handle CPU unplug correctly cpu: Abstract CPU core type qdev: hotplug: Introduce HotplugHandler.pre_plug() callback target-ppc: Fix rlwimi, rlwinm, rlwnm vfio: Fix broken EEH target-ppc: Bug in BookE wait instruction ppc / sparc: Add a tester for checking whether OpenBIOS runs successfully hw/ppc/spapr: Silence deprecation message in qtest mode
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4a4b344c |
| 12-May-2016 |
Bharata B Rao <bharata@linux.vnet.ibm.com> |
xics,xics_kvm: Handle CPU unplug correctly
XICS is setup for each CPU during initialization. Provide a routine to undo the same when CPU is unplugged. While here, move ss->cs management into xics fr
xics,xics_kvm: Handle CPU unplug correctly
XICS is setup for each CPU during initialization. Provide a routine to undo the same when CPU is unplugged. While here, move ss->cs management into xics from xics_kvm since there is nothing KVM specific in it. Also ensure xics reset doesn't set irq for CPUs that are already unplugged.
This allows reboot of a VM that has undergone CPU hotplug and unplug to work correctly.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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776efef3 |
| 19-May-2016 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
NEED_CPU_H cleanups, big enough to deserve their own pull request.
# gpg: Signature made Thu 19 May 2016 15:42:37 BST u
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
NEED_CPU_H cleanups, big enough to deserve their own pull request.
# gpg: Signature made Thu 19 May 2016 15:42:37 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"
* remotes/bonzini/tags/for-upstream: (52 commits) hw: clean up hw/hw.h includes hw: remove pio_addr_t cpu: move exec-all.h inclusion out of cpu.h exec: extract exec/tb-context.h hw: explicitly include qemu/log.h mips: move CP0 functions out of cpu.h arm: move arm_log_exception into .c file qemu-common: push cpu.h inclusion out of qemu-common.h acpi: do not use TARGET_PAGE_SIZE s390x: reorganize CSS bits between cpu.h and other headers dma: do not depend on kvm_enabled() gdbstub: remove unnecessary includes from gdbstub-xml.c qemu-common: stop including qemu/host-utils.h from qemu-common.h qemu-common: stop including qemu/bswap.h from qemu-common.h cpu: move endian-dependent load/store functions to cpu-all.h hw: cannot include hw/hw.h from user emulation hw: move CPU state serialization to migration/cpu.h hw: do not use VMSTATE_*TL include: poison symbols in osdep.h apic: move target-dependent definitions to cpu.h ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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