Include qemu/module.h where needed, drop it from qemu-common.h

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-4-armbru@redhat.com>
[Rebased with conflicts res

Include qemu/module.h where needed, drop it from qemu-common.h

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-4-armbru@redhat.com>
[Rebased with conflicts resolved automatically, except for
hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c
hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c;
ui/cocoa.m fixed up]

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161028' into staging

target-arm queue:
* Fix reset GPIO handling for spitz, tosa boards
* virt: add 'pmu' property for configu

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161028' into staging

target-arm queue:
* Fix reset GPIO handling for spitz, tosa boards
* virt: add 'pmu' property for configuring whether to expose the
vPMU to the guest
* char: cadence: correct reset value for baud rate registers
* versatilepb: do not run if user asks for more than 256MB RAM
* pxa2xx: Set value default values for CCCR and CKEN on PXA255
* arm: cubieboard: Add support for initrd
* i.MX: Fix GPIO ISR register write

# gpg: Signature made Fri 28 Oct 2016 15:56:56 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20161028:
hw/arm/tosa: Fix reset handling
hw/arm/spitz: Fix reset handling
arm: virt: add PMU property to mach-virt machine type
arm: Add an option to turn on/off vPMU support
char: cadence: correct reset value for baud rate registers
versatilepb: do not run if user asks for more than 256MB RAM
hw/arm/pxa2xx: Set value default values for CCCR and CKEN on PXA255
arm: cubieboard: Add support for initrd
i.MX: Fix GPIO ISR register write

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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i.MX: Fix GPIO ISR register write

Writing the ISR register is supposed to clear interrupt status bits,
not to set them.

This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel

i.MX: Fix GPIO ISR register write

Writing the ISR register is supposed to clear interrupt status bits,
not to set them.

This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with
multi_v7_defconfig; mainline has different problems).

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 1477361005-18646-1-git-send-email-linux@roeck-us.net
Acked-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

NEED_CPU_H cleanups, big enough to deserve their own pull request.

# gpg: Signature made Thu 19 May 2016 15:42:37 BST u

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

NEED_CPU_H cleanups, big enough to deserve their own pull request.

# gpg: Signature made Thu 19 May 2016 15:42:37 BST using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"

* remotes/bonzini/tags/for-upstream: (52 commits)
hw: clean up hw/hw.h includes
hw: remove pio_addr_t
cpu: move exec-all.h inclusion out of cpu.h
exec: extract exec/tb-context.h
hw: explicitly include qemu/log.h
mips: move CP0 functions out of cpu.h
arm: move arm_log_exception into .c file
qemu-common: push cpu.h inclusion out of qemu-common.h
acpi: do not use TARGET_PAGE_SIZE
s390x: reorganize CSS bits between cpu.h and other headers
dma: do not depend on kvm_enabled()
gdbstub: remove unnecessary includes from gdbstub-xml.c
qemu-common: stop including qemu/host-utils.h from qemu-common.h
qemu-common: stop including qemu/bswap.h from qemu-common.h
cpu: move endian-dependent load/store functions to cpu-all.h
hw: cannot include hw/hw.h from user emulation
hw: move CPU state serialization to migration/cpu.h
hw: do not use VMSTATE_*TL
include: poison symbols in osdep.h
apic: move target-dependent definitions to cpu.h
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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hw: explicitly include qemu/log.h

Move the inclusion out of hw/hw.h, most files do not need it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

arm: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-b

arm: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1453832250-766-13-git-send-email-peter.maydell@linaro.org

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151217-1' into staging

target-arm queue:
* i.MX CCM patches
* support guest debug for AArch64 KVM
* support power button on v

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151217-1' into staging

target-arm queue:
* i.MX CCM patches
* support guest debug for AArch64 KVM
* support power button on virt board via GPIO
* clean up AArch32 singlestep code
* raise exception on misaligned LDREX operands
* soc-dma: use hwaddr instead of target_ulong in printf
* explicitly mark some ARM device loads as little-endian
* i.MX: add support for lower and upper interrupt in GPIO

# gpg: Signature made Thu 17 Dec 2015 13:38:09 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20151217-1: (25 commits)
i.MX: Add an i.MX25 specific CCM class/instance
i.MX: Split the CCM class into an abstract base class and a concrete class
i.MX: rename i.MX CCM get_clock() function and CLK ID enum names
i.MX: Fix i.MX31 default/reset configuration
tests/guest-debug: introduce basic gdbstub tests
target-arm: kvm - re-inject guest debug exceptions
target-arm: kvm - add support for HW assisted debug
target-arm: kvm - support for single step
target-arm: kvm - implement software breakpoints
target-arm: kvm64 - introduce kvm_arm_init_debug()
ARM: Virt: Add gpio-keys node for Poweroff using DT
ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3
ARM: ACPI: Add _E03 for Power Button
ACPI: Add aml_gpio_int() wrapper for GPIO Interrupt Connection
ACPI: Add GPIO Connection Descriptor
ARM: ACPI: Add power button device in ACPI DSDT table
ARM: ACPI: Add GPIO controller in ACPI DSDT table
ARM: Virt: Add a GPIO controller
acpi: extend aml_interrupt() to support multiple irqs
acpi: support serialized method
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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i.MX: add support for lower and upper interrupt in GPIO.

The i.MX6 GPIO device supports 2 interrupts instead of one.

* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.

i.MX31 and i.MX25 only

i.MX: add support for lower and upper interrupt in GPIO.

The i.MX6 GPIO device supports 2 interrupts instead of one.

* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.

i.MX31 and i.MX25 only support 1 interrupt for the 32 GPIOs.

So we add a property to turn the behavior on when required.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 1447497668-1603-1-git-send-email-jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151027-1' into staging

target-arm queue:
* more EL2 preparation: handling for stage 2 translations
* standardize debug macros

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151027-1' into staging

target-arm queue:
* more EL2 preparation: handling for stage 2 translations
* standardize debug macros in i.MX devices
* improve error message in a corner case for virt board
* disable live migration of KVM GIC if the kernel can't handle it
* add SPSR_(ABT|UND|IRQ|FIQ) registers
* handle non-executable page-straddling Thumb instructions
* fix a "no 64-bit EL2" assumption in arm_excp_unmasked()

# gpg: Signature made Tue 27 Oct 2015 16:03:31 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20151027-1: (27 commits)
target-arm: Add support for S1 + S2 MMU translations
target-arm: Route S2 MMU faults to EL2
target-arm: Add S2 translation to 32bit S1 PTWs
target-arm: Add S2 translation to 64bit S1 PTWs
target-arm: Add ARMMMUFaultInfo
target-arm: Avoid inline for get_phys_addr
target-arm: Add support for S2 page-table protection bits
target-arm: Add computation of starting level for S2 PTW
target-arm: lpae: Rename granule_sz to stride
target-arm: lpae: Replace tsz with computed inputsize
target-arm: Add support for AArch32 S2 negative t0sz
target-arm: lpae: Move declaration of t0sz and t1sz
target-arm: lpae: Make t0sz and t1sz signed integers
target-arm: Add HPFAR_EL2
i.MX: Standardize i.MX GPT debug
i.MX: Standardize i.MX EPIT debug
i.MX: Standardize i.MX FEC debug
i.MX: Standardize i.MX CCM debug
i.MX: Standardize i.MX AVIC debug
i.MX: Standardize i.MX I2C debug
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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i.MX: Standardize i.MX GPIO debug

The goal is to have debug code always compiled during build.

We standardize all debug output on the following format:

[QOM_TYPE_NAME]reporting_function: debug mes

i.MX: Standardize i.MX GPIO debug

The goal is to have debug code always compiled during build.

We standardize all debug output on the following format:

[QOM_TYPE_NAME]reporting_function: debug message

The qemu_log_mask() outputis following the same format as
the above debug.

Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 4f2007adcf0f579864bb4dd8a825824e0e9098b8.1445781957.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150914' into staging

target-arm queue:
* fix GIC region size in xlnx-zynqmp
* xlnx-zynqmp: Remove unnecessary brackets
* impr

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150914' into staging

target-arm queue:
* fix GIC region size in xlnx-zynqmp
* xlnx-zynqmp: Remove unnecessary brackets
* improve A64 generated TCG code
* add GPIO devices to i.MX25 and i.MX31
* more missing pieces for EL2 support

# gpg: Signature made Mon 14 Sep 2015 14:51:12 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"

* remotes/pmaydell/tags/pull-target-arm-20150914: (24 commits)
target-arm: Add VMPIDR_EL2
target-arm: Break out mpidr_read_val()
target-arm: Add VPIDR_EL2
target-arm: Suppress EPD for S2, EL2 and EL3 translations
target-arm: Suppress TBI for S2 translations
target-arm: Add VTTBR_EL2
target-arm: Add VTCR_EL2
hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully
i.MX: Add GPIO devices to i.MX25 SOC
i.MX: Add GPIO devices to i.MX31 SOC
i.MX: Add GPIO device
target-arm: Use tcg_gen_extrh_i64_i32
target-arm: Recognize ROR
target-arm: Eliminate unnecessary zero-extend in disas_bitfield
target-arm: Recognize UXTB, UXTH, LSR, LSL
target-arm: Recognize SXTB, SXTH, SXTW, ASR
target-arm: Implement fcsel with movcond
target-arm: Implement ccmp branchless
target-arm: Use setcond and movcond for csel
target-arm: Handle always condition codes within arm_test_cc
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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i.MX: Add GPIO device

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 5ea3b0021e47cf7f7d883a7edbabee44980f3df7.14

i.MX: Add GPIO device

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 5ea3b0021e47cf7f7d883a7edbabee44980f3df7.1441828793.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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