Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging

* Fix sign-extension for SMLAL* instructions
* Various ptimer device conversions to new transaction API

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging

* Fix sign-extension for SMLAL* instructions
* Various ptimer device conversions to new transaction API
* Add a dummy Samsung SDHCI controller model to exynos4 boards
* Minor refactorings of RAM creation for some arm boards

# gpg: Signature made Tue 22 Oct 2019 17:44:26 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191022-2:
hw/arm/digic4: Inline digic4_board_setup_ram() function
hw/arm/omap1: Create the RAM in the board
hw/arm/omap2: Create the RAM in the board
hw/arm/collie: Create the RAM in the board
hw/arm/mps2: Use the IEC binary prefix definitions
hw/arm/xilinx_zynq: Use the IEC binary prefix definitions
hw/arm/exynos4210: Use the Samsung s3c SDHCI controller
hw/sd/sdhci: Add dummy Samsung SDHCI controller
hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions
hw/m68k/mcf5208.c: Switch to transaction-based ptimer API
hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API
hw/timer/altera_timer.c: Switch to transaction-based ptimer API
hw/timer/lm32_timer: Switch to transaction-based ptimer API
hw/timer/sh_timer: Switch to transaction-based ptimer API
hw/timer/puv3_ost.c: Switch to transaction-based ptimer API
hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init()
hw/timer/exynos4210_mct: Initialize ptimer before starting it
target/arm: Fix sign-extension for SMLAL*

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

hw/arm/digic4: Inline digic4_board_setup_ram() function

Having the RAM creation code in a separate function is not
very helpful. Move this code directly inside the board_init()
function, this will l

hw/arm/digic4: Inline digic4_board_setup_ram() function

Having the RAM creation code in a separate function is not
very helpful. Move this code directly inside the board_init()
function, this will later allow the board to have the QOM
ownership of the RAM.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191021190653.9511-7-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/armbru/tags/pull-pflash-2019-03-11' into staging

Pflash and firmware configuration patches for 2019-03-11

# gpg: Signature made Mon 11 Mar 2019 21:59:12 GMT
#

Merge remote-tracking branch 'remotes/armbru/tags/pull-pflash-2019-03-11' into staging

Pflash and firmware configuration patches for 2019-03-11

# gpg: Signature made Mon 11 Mar 2019 21:59:12 GMT
# gpg: using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-pflash-2019-03-11: (27 commits)
docs/interop/firmware.json: Prefer -machine to if=pflash
pc: Support firmware configuration with -blockdev
pc_sysfw: Pass PCMachineState to pc_system_firmware_init()
pc_sysfw: Remove unused PcSysFwDevice
pflash_cfi01: Add pflash_cfi01_get_blk() helper
vl: Create block backends before setting machine properties
vl: Factor configure_blockdev() out of main()
vl: Improve legibility of BlockdevOptions queue
sysbus: Fix latent bug with onboard devices
vl: Fix latent bug with -global and onboard devices
qom: Move compat_props machinery from qdev to QOM
qdev: Fix latent bug with compat_props and onboard devices
pflash: Clean up after commit 368a354f02b, part 2
pflash: Clean up after commit 368a354f02b, part 1
mips_malta: Clean up definition of flash memory size somewhat
hw/mips/malta: Restrict 'bios_size' variable scope
hw/mips/malta: Remove fl_sectors variable
mips_malta: Delete disabled, broken DEBUG_BOARD_INIT code
r2d: Fix flash memory size, sector size, width, device ID
ppc405_boards: Don't size flash memory to match backing image
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

pflash: Clean up after commit 368a354f02b, part 2

Our pflash devices are simplistically modelled has having
"num-blocks" sectors of equal size "sector-length". Real hardware
commonly has sectors of

pflash: Clean up after commit 368a354f02b, part 2

Our pflash devices are simplistically modelled has having
"num-blocks" sectors of equal size "sector-length". Real hardware
commonly has sectors of different sizes. How our "sector-length"
property is related to the physical device's multiple sector sizes
is unclear.

Helper functions pflash_cfi01_register() and pflash_cfi02_register()
create a pflash device, set properties including "sector-length" and
"num-blocks", and realize. They take parameters @size, @sector_len
and @nb_blocs.

QOMification left parameter @size unused. Obviously, @size should
match @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs.
All callers satisfy this.

Remove @nb_blocs and compute it from @size and @sector_len.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190308094610.21210-16-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

show more ...

pflash: Clean up after commit 368a354f02b, part 1

QOMification left parameter @qdev unused in pflash_cfi01_register()
and pflash_cfi02_register(). All callers pass NULL. Remove.

Signed-off-by: Ma

pflash: Clean up after commit 368a354f02b, part 1

QOMification left parameter @qdev unused in pflash_cfi01_register()
and pflash_cfi02_register(). All callers pass NULL. Remove.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190308094610.21210-15-armbru@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907' into staging

target-arm:
* cleanups converting to DEFINE_PROP_LINK
* allwinner-a10: mark as not user-creatable
* init

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907' into staging

target-arm:
* cleanups converting to DEFINE_PROP_LINK
* allwinner-a10: mark as not user-creatable
* initial patches working towards ARMv8M support
* implement generating aborts on memory transaction failures
* make BXJ behave correctly (ie not UNDEF) on ARMv6-and-later

# gpg: Signature made Thu 07 Sep 2017 14:26:07 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20170907: (31 commits)
target/arm: Add Jazelle feature
target/arm: Implement new do_transaction_failed hook
hw/arm: Set ignore_memory_transaction_failures for most ARM boards
boards.h: Define new flag ignore_memory_transaction_failures
target/arm: Implement BXNS, and banked stack pointers
target/arm: Move regime_is_secure() to target/arm/internals.h
target/arm: Make CFSR register banked for v8M
target/arm: Make MMFAR banked for v8M
target/arm: Make CCR register banked for v8M
target/arm: Make MPU_CTRL register banked for v8M
target/arm: Make MPU_RNR register banked for v8M
target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M
target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M
target/arm: Make VTOR register banked for v8M
nvic: Add NS alias SCS region
target/arm: Make CONTROL register banked for v8M
target/arm: Make FAULTMASK register banked for v8M
target/arm: Make PRIMASK register banked for v8M
target/arm: Make BASEPRI register banked for v8M
target/arm: Add MMU indexes for secure v8M
...

# Conflicts:
# target/arm/translate.c

show more ...

hw/arm: Set ignore_memory_transaction_failures for most ARM boards

Set the MachineClass flag ignore_memory_transaction_failures
for almost all ARM boards. This means they retain the legacy
behaviour

hw/arm: Set ignore_memory_transaction_failures for most ARM boards

Set the MachineClass flag ignore_memory_transaction_failures
for almost all ARM boards. This means they retain the legacy
behaviour that accesses to unimplemented addresses will RAZ/WI
rather than aborting, when a subsequent commit adds support
for external aborts.

The exceptions are:
* virt -- we know that guests won't try to prod devices
that we don't describe in the device tree or ACPI tables
* mps2 -- this board was written to use unimplemented-device
for all the ranges with devices we don't yet handle

New boards should not set the flag, but instead be written
like the mps2.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 1504626814-23124-3-git-send-email-peter.maydell@linaro.org
For the Xilinx boards:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

show more ...

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Log filtering from Alex and Peter
* Chardev fix from Marc-André
* config.status tweak from David
* Header file tweaks

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Log filtering from Alex and Peter
* Chardev fix from Marc-André
* config.status tweak from David
* Header file tweaks from Markus, myself and Veronia (Outreachy candidate)
* get_ticks_per_sec() removal from Rutuja (Outreachy candidate)
* Coverity fix from myself
* PKE implementation from myself, based on rth's XSAVE support

# gpg: Signature made Thu 24 Mar 2016 20:15:11 GMT using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"

* remotes/bonzini/tags/for-upstream: (28 commits)
target-i386: implement PKE for TCG
config.status: Pass extra parameters
char: translate from QIOChannel error to errno
exec: fix error handling in file_ram_alloc
cputlb: modernise the debug support
qemu-log: support simple pid substitution for logs
target-arm: dfilter support for in_asm
qemu-log: dfilter-ise exec, out_asm, op and opt_op
qemu-log: new option -dfilter to limit output
qemu-log: Improve the "exec" TB execution logging
qemu-log: Avoid function call for disabled qemu_log_mask logging
qemu-log: correct help text for -d cpu
tcg: pass down TranslationBlock to tcg_code_gen
util: move declarations out of qemu-common.h
Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND
hw: explicitly include qemu-common.h and cpu.h
include/crypto: Include qapi-types.h or qemu/bswap.h instead of qemu-common.h
isa: Move DMA_transfer_handler from qemu-common.h to hw/isa/isa.h
Move ParallelIOArg from qemu-common.h to sysemu/char.h
Move QEMU_ALIGN_*() from qemu-common.h to qemu/osdep.h
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Conflicts:
scripts/clean-includes

show more ...

hw: explicitly include qemu-common.h and cpu.h

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

include/qemu/osdep.h: Don't include qapi/error.h

Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its fi

include/qemu/osdep.h: Don't include qapi/error.h

Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.

Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.

Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.

This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

hw/arm: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-of

hw/arm: Clean up includes

Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.

This commit was created with scripts/clean-includes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1449505425-32022-4-git-send-email-peter.maydell@linaro.org

show more ...

Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2016-01-13' into staging

Error reporting patches for 2016-01-13

# gpg: Signature made Wed 13 Jan 2016 14:21:48 GMT using RSA key ID EB91

Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2016-01-13' into staging

Error reporting patches for 2016-01-13

# gpg: Signature made Wed 13 Jan 2016 14:21:48 GMT using RSA key ID EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>"

* remotes/armbru/tags/pull-error-2016-01-13: (41 commits)
checkpatch: Detect newlines in error_report and other error functions
error: Consistently name Error * objects err, and not errp
s390/sclp: Simplify control flow in sclp_realize()
hw/s390x: Rename local variables Error *l_err to just err
error: Clean up errors with embedded newlines (again)
vhdx: Fix "log that needs to be replayed" error message
pci-assign: Clean up "Failed to assign" error messages
vmdk: Clean up "Invalid extent lines" error message
vmdk: Clean up control flow in vmdk_parse_extents() a bit
error: Strip trailing '\n' from error string arguments (again)
qemu-io qemu-nbd: Use error_report() etc. instead of fprintf()
migration: Use error_reportf_err() instead of monitor_printf()
spapr: Use error_reportf_err()
error: Use error_prepend() where it makes obvious sense
error: Use error_reportf_err() where it makes obvious sense
error: Don't decorate original error message when adding to it
error: New error_prepend(), error_reportf_err()
test-throttle: Simplify qemu_init_main_loop() error handling
qemu-nbd: Clean up "Failed to load snapshot" error message
block: Clean up "Could not create temporary overlay" error message
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

error: Use error_reportf_err() where it makes obvious sense

Done with this Coccinelle semantic patch

@@
expression FMT, E, S;
expression list ARGS;
@@
- error_report(FMT, ARG

error: Use error_reportf_err() where it makes obvious sense

Done with this Coccinelle semantic patch

@@
expression FMT, E, S;
expression list ARGS;
@@
- error_report(FMT, ARGS, error_get_pretty(E));
+ error_reportf_err(E, FMT/*@@@*/, ARGS);
(
- error_free(E);
|
exit(S);
|
abort();
)

followed by a replace of '%s"/*@@@*/' by '"' and some line rewrapping,
because I can't figure out how to make Coccinelle transform strings.

We now use the error whole instead of just its message obtained with
error_get_pretty(). This avoids suppressing its hint (see commit
50b7b00), but I can't see how the errors touched in this commit could
come with hints.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1450452927-8346-12-git-send-email-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* QOM API error handling fixes
* Performance improvements for

Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* QOM API error handling fixes
* Performance improvements for device GPIO property creation
* Remaining conversion of QEMUMachine to QOM

# gpg: Signature made Sat 19 Sep 2015 15:40:44 BST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/qom-devices-for-peter: (21 commits)
machine: Eliminate QEMUMachine and qemu_register_machine()
Revert use of DEFINE_MACHINE() for registrations of multiple machines
Use DEFINE_MACHINE() to register all machines
mac_world: Break long line
machine: DEFINE_MACHINE() macro
exynos4: Declare each QEMUMachine as a separate variable
exynos4: Use MachineClass instead of exynos4_machines array
exynos4: Use EXYNOS4210_NCPUS instead of max_cpus on error message
machine: Set MachineClass::name automatically
machine: Ensure all TYPE_MACHINE subclasses have the right suffix
mac99: Use MACHINE_TYPE_NAME to encode class name
s390: Rename s390-ccw-virtio-2.4 class name to use MACHINE_TYPE_NAME
s390-virtio: Rename machine class name to use MACHINE_TYPE_NAME
pseries: Rename machine class names to use MACHINE_TYPE_NAME
arm: Rename virt machine class to use MACHINE_TYPE_NAME
vexpress: Rename machine classes to use MACHINE_TYPE_NAME
vexpress: Don't set name on abstract class
machine: MACHINE_TYPE_NAME macro
qdev: Do not use slow [*] expansion for GPIO creation
qom: Fix invalid error check in property_get_str()
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Use DEFINE_MACHINE() to register all machines

Convert all machines to use DEFINE_MACHINE() instead of QEMUMachine
automatically using a script.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

Use DEFINE_MACHINE() to register all machines

Convert all machines to use DEFINE_MACHINE() instead of QEMUMachine
automatically using a script.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
[AF: Style cleanups, convert imx25_pdk machine]
Signed-off-by: Andreas Färber <afaerber@suse.de>

show more ...

arm: memory: Replace memory_region_init_ram with memory_region_allocate_system_memory

Commit 0b183fc871:"memory: move mem_path handling to
memory_region_allocate_system_memory" split memory_region_i

arm: memory: Replace memory_region_init_ram with memory_region_allocate_system_memory

Commit 0b183fc871:"memory: move mem_path handling to
memory_region_allocate_system_memory" split memory_region_init_ram and
memory_region_init_ram_from_file. Also it moved mem-path handling a step
up from memory_region_init_ram to memory_region_allocate_system_memory.

Therefore for any board that uses memory_region_init_ram directly,
-mem-path is not supported.

Fix this by replacing memory_region_init_ram with
memory_region_allocate_system_memory.

Signed-off-by: Dirk Mueller <dmueller@suse.com>
Message-id: CAL5wTH4UHYKpJF=dLJfFzxpufjY189chnCow47-ySuLf8GLbug@mail.gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-19' into staging

trivial patches for 2015-03-19

# gpg: Signature made Thu Mar 19 08:57:54 2015 GMT using RSA key ID A4C3D

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-19' into staging

trivial patches for 2015-03-19

# gpg: Signature made Thu Mar 19 08:57:54 2015 GMT using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2015-03-19: (24 commits)
qga/commands-posix: Fix resource leak
elf-loader: Add missing error handling for call of lseek
elf-loader: Fix truncation warning from coverity
hmp: Fix texinfo documentation
Fix typos in comments
qtest/ahci: Fix a bit mask expression
vl: fix resource leak with monitor_fdset_add_fd
smbios: add max speed comdline option for type-17 (meory device) structure
pc-dimm: Add description for device list.
configure: enable kvm on x32
error: Replace error_report() & error_free() with error_report_err()
arm: fix memory leak
qmp: Drop unused .user_print from command definitions
hmp: Fix definition of command quit
target-moxie: Fix warnings from Sparse (one-bit signed bitfield)
block/qapi: Fix Sparse warning
Fix remaining warnings from Sparse (void return)
qom: Fix warning from Sparse
target-mips: Fix warning from Sparse
arm/nseries: Fix warnings from Sparse
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

arm: fix memory leak

Cc: Michael Tokarev <mjt@tls.msk.ru>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Gonglei <arei.gonglei@huawei.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-04' into staging

trivial patches for 2015-03-04

# gpg: Signature made Tue Mar 10 05:16:59 2015 GMT using RSA key ID A4C3D

Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-03-04' into staging

trivial patches for 2015-03-04

# gpg: Signature made Tue Mar 10 05:16:59 2015 GMT using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"

* remotes/mjt/tags/pull-trivial-patches-2015-03-04: (44 commits)
9pfs: remove useless return
gdbstub: avoid possible NULL pointer dereference
milkymist-pfpu: fix GCC 5.0.0 aggressive-loop-optimizations warning
fix GCC 5.0.0 logical-not-parentheses warnings
migration: Fix coding style (whitespace issues)
oslib-posix: Fix compiler warning (-Wclobbered) and simplify the code
disas/microblaze: Fix warnings caused by missing 'static' attribute
disas/arm: Fix warnings caused by missing 'static' attribute
vhost_net: Add missing 'static' attribute
e500: fix memory leak
gitignore: Ignore new tests
gitignore: Track common.env in iotests gitignore
sysbus: fix memory leak
milkymist.c: fix memory leak
macio: fix possible memory leak
sparc/leon3.c: fix memory leak
nbd: fix resource leak
qemu-char: add cyrillic key 'numerosign' to Russian keymap
qemu-char: add cyrillic characters 'numerosign' to VNC keysyms
qapi-schema: Fix SpiceChannel docs
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

arm/digic_boards: Remove superfluous '\n' around error_report()

Signed-off-by: Gonglei <arei.gonglei@huawei.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael Tokarev <mj

arm/digic_boards: Remove superfluous '\n' around error_report()

Signed-off-by: Gonglei <arei.gonglei@huawei.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

- Memory: improve error reporting and avoid crashes on hotplug
- Build: fixing block/iscsi.so and ranlib warnings on Mac

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

- Memory: improve error reporting and avoid crashes on hotplug
- Build: fixing block/iscsi.so and ranlib warnings on Mac OS X
- Migration fixes for x86
- The odd KVM patch.

# gpg: Signature made Thu 11 Sep 2014 11:21:10 BST using RSA key ID 9B4D86F2
# gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: aka "Paolo Bonzini <bonzini@gnu.org>"

* remotes/bonzini/tags/for-upstream: (21 commits)
gdbstub: init mon_chr through qemu_chr_alloc
pckbd: adding new fields to vmstate
mc146818rtc: add missed field to vmstate
piix: do not set irq while loading vmstate
serial: fixing vmstate for save/restore
parallel: adding vmstate for save/restore
fdc: adding vmstate for save/restore
cpu: init vmstate for ticks and clock offset
apic_common: vapic_paddr synchronization fix
vl: use QLIST_FOREACH_SAFE to visit change state handlers
exec: add parameter errp to gethugepagesize
exec: report error when memory < hpagesize
hostmem-ram: don't exit qemu if size of memory-backend-ram is way too big
memory: add parameter errp to memory_region_init_rom_device
memory: add parameter errp to memory_region_init_ram
exec: add parameter errp to qemu_ram_alloc and qemu_ram_alloc_from_ptr
rules.mak: Fix DSO build by pulling in archive symbols
util: Don't link host-utils.o if it's empty
util: Move general qemu_getauxval to util/getauxval.c
trace: Only link generated-tracers.o with "simple" backend
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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memory: add parameter errp to memory_region_init_ram

Add parameter errp to memory_region_init_ram and update all call sites
to pass in &error_abort.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Rev

memory: add parameter errp to memory_region_init_ram

Add parameter errp to memory_region_init_ram and update all call sites
to pass in &error_abort.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM/QTest infrastructure fixes and device conversions

* qom-test extension
* QEMUMachineInitArgs conversion t

Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM/QTest infrastructure fixes and device conversions

* qom-test extension
* QEMUMachineInitArgs conversion to MachineState
* -machine options turned into /machine properties
* Named GPIO IRQs for devices

# gpg: Signature made Wed 28 May 2014 18:24:04 BST using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

* remotes/afaerber/tags/qom-devices-for-peter:
ssi: Name the CS GPIO
qdev: Implement named GPIOs
machine: Make -machine opts properties of MachineState
tests: Check empty QMP output visitor
qapi: Avoid output visitor crashing if it encounters a NULL value
vl.c: Do not set 'type' property in obj_set_property()
machine: Conversion of QEMUMachineInitArgs to MachineState
qom-test: Test qom-list on link<> properties

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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machine: Conversion of QEMUMachineInitArgs to MachineState

Total removal of QEMUMachineInitArgs struct. QEMUMachineInitArgs's fields
are copied into MachineState. Removed duplicated fields from Mach

machine: Conversion of QEMUMachineInitArgs to MachineState

Total removal of QEMUMachineInitArgs struct. QEMUMachineInitArgs's fields
are copied into MachineState. Removed duplicated fields from MachineState.

All the other changes are only mechanical refactoring, no semantic changes.

Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> (s390)
Reviewed-by: Michael S. Tsirkin <mst@redhat.com> (PC)
[AF: Renamed ms -> machine, use MACHINE_GET_CLASS()]
Signed-off-by: Andreas Färber <afaerber@suse.de>

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Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131217' into staging

target-arm queue:
* AES instruction support for 32 bit ARM
* pflash01: much better emulation of 2x16bit and simil

Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131217' into staging

target-arm queue:
* AES instruction support for 32 bit ARM
* pflash01: much better emulation of 2x16bit and similar configs
where multiple flash devices are banked together
* fixed CBAR handling on Zynq, Highbank
* initial AArch64 KVM control support
* first two chunks of patches for A64 instruction emulation
* new board: canon-a1100 (Canon DIGIC SoC)
* new board: cubieboard (Allwinner A10 SoC)

# gpg: Signature made Tue 17 Dec 2013 12:18:39 PM PST using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Alexander Graf (14) and others
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20131217: (62 commits)
MAINTAINERS: add myself to maintain allwinner-a10
hw/arm: add cubieboard support
hw/arm: add allwinner a10 SoC support
hw/intc: add allwinner A10 interrupt controller
hw/timer: add allwinner a10 timer
vmstate: Add support for an array of ptimer_state *
MAINTAINERS: Document 'Canon DIGIC' machine
hw/arm/digic: add NOR ROM support
hw/arm/digic: add UART support
hw/arm/digic: add timer support
hw/arm/digic: prepare DIGIC-based boards support
hw/arm: add very initial support for Canon DIGIC SoC
target-arm: A64: add support for logical (immediate) insns
target-arm: A64: add support for 1-src CLS insn
host-utils: add clrsb32/64 - count leading redundant sign bits
target-arm: A64: add support for bitfield insns
target-arm: A64: add support for 1-src REV insns
target-arm: A64: add support for 1-src RBIT insn
target-arm: A64: add support for 1-src data processing and CLZ
target-arm: A64: add support for 2-src shift reg insns
...

Message-id: 1387312160-12318-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: Anthony Liguori <aliguori@amazon.com>

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