#
8d7f954a |
| 06-Jun-2023 |
qianfan Zhao <qianfanguijin@163.com> |
docs: system: arm: Introduce bananapi_m2u
Add documents for Banana Pi M2U
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> [PMM: Minor for
docs: system: arm: Introduce bananapi_m2u
Add documents for Banana Pi M2U
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> [PMM: Minor format fixes to correct sphinx errors] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
526f1f3a |
| 02-Aug-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210802' into staging
target-arm queue: * Add documentation of Arm 'mainstone', 'kzm', 'imx25-pdk' boards * MAINTAINERS: Don't
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210802' into staging
target-arm queue: * Add documentation of Arm 'mainstone', 'kzm', 'imx25-pdk' boards * MAINTAINERS: Don't list Andrzej Zaborowski for various components * docs: Remove stale TODO comments about license and version * docs: Move licence/copyright from HTML output to rST comments * docs: Format literal text correctly * hw/arm/boot: Report error if there is no fw_cfg device in the machine * docs: rSTify barrier.txt and bootindex.txt
# gpg: Signature made Mon 02 Aug 2021 12:57:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210802: (21 commits) docs: Move user-facing barrier docs into system manual ui/input-barrier: Move TODOs from barrier.txt to a comment docs: Move the protocol part of barrier.txt into interop docs: Move bootindex.txt into system section and rstify hw/arm/boot: Report error if there is no fw_cfg device in the machine docs/tools/virtiofsd.rst: Delete stray backtick docs/about/removed-features: Fix markup error docs: Format literals correctly docs/system/arm/cpu-features.rst: Format literals correctly docs/system/s390x/protvirt.rst: Format literals correctly docs/devel: Format literals correctly docs/devel/migration.rst: Format literals correctly docs/devel/ebpf_rss.rst: Format literals correctly docs/devel/build-system.rst: Correct typo in example code docs/devel/build-system.rst: Format literals correctly docs: Move licence/copyright from HTML output to rST comments docs: Remove stale TODO comments about license and version MAINTAINERS: Don't list Andrzej Zaborowski for various components docs: Add documentation of Arm 'imx25-pdk' board docs: Add documentation of Arm 'kzm' board ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
b1b3e3e3 |
| 22-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add documentation of Arm 'imx25-pdk' board
Add brief documentation of the Arm 'imx25-pdk' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richar
docs: Add documentation of Arm 'imx25-pdk' board
Add brief documentation of the Arm 'imx25-pdk' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210722175229.29065-4-peter.maydell@linaro.org
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fa6c9394 |
| 22-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add documentation of Arm 'kzm' board
Add brief documentation of the Arm 'kzm' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@
docs: Add documentation of Arm 'kzm' board
Add brief documentation of the Arm 'kzm' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210722175229.29065-3-peter.maydell@linaro.org
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c9543db4 |
| 22-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add documentation of Arm 'mainstone' board
Add brief documentation of the Arm 'mainstone' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richar
docs: Add documentation of Arm 'mainstone' board
Add brief documentation of the Arm 'mainstone' board.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210722175229.29065-2-peter.maydell@linaro.org
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#
fd79f89c |
| 18-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718' into staging
target-arm queue: * Remove duplicate 'plus1' function from Neon and SVE decode * Fix offsets for TTBCR fo
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718' into staging
target-arm queue: * Remove duplicate 'plus1' function from Neon and SVE decode * Fix offsets for TTBCR for big-endian hosts * docs: fix copyright date * docs: add license/version info to HTML footers * docs: add an About section * docs: document some more arm boards
# gpg: Signature made Sun 18 Jul 2021 13:45:22 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210718: target/arm: Remove duplicate 'plus1' function from Neon and SVE decode docs: Add skeletal documentation of highbank and midway docs: Add skeletal documentation of the emcraft-sf2 docs: Add skeletal documentation of cubieboard docs: Add QEMU version information to HTML footer docs: Add license note to the HTML page footer docs: Add some actual About text to about/index.rst docs: Move deprecation, build and license info out of system/ docs: Remove "Contents:" lines from top-level subsections docs: Stop calling the top level subsections of our manual 'manuals' docs: Fix documentation Copyright date target/arm: Fix offsets for TTBCR
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c90df7ce |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add skeletal documentation of highbank and midway
Add skeletal documentation for the highbank and midway machines.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard
docs: Add skeletal documentation of highbank and midway
Add skeletal documentation for the highbank and midway machines.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-4-peter.maydell@linaro.org
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#
3f65df38 |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add skeletal documentation of the emcraft-sf2
Add skeletal documentation of the emcraft-sf2 machine.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <ri
docs: Add skeletal documentation of the emcraft-sf2
Add skeletal documentation of the emcraft-sf2 machine.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-3-peter.maydell@linaro.org
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#
d4a7c362 |
| 13-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs: Add skeletal documentation of cubieboard
Add skeletal documentation of the cubieboard machine.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.
docs: Add skeletal documentation of cubieboard
Add skeletal documentation of the cubieboard machine.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210713142226.19155-2-peter.maydell@linaro.org
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#
3cfcc329 |
| 11-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210709' into staging
target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210709' into staging
target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message
# gpg: Signature made Fri 09 Jul 2021 17:09:10 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210709: hw/intc: Improve formatting of MEMTX_ERROR guest error message target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint hw/arm/stellaris: Expand comment about handling of OLED chipselect hw/gpio/pl061: Document a shortcoming in our implementation hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset hw/arm/virt: Make PL061 GPIO lines pulled low, not high hw/gpio/pl061: Make pullup/pulldown of outputs configurable hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers hw/gpio/pl061: Document the interface of this device hw/gpio/pl061: Add tracepoints for register read and write hw/gpio/pl061: Clean up read/write offset handling logic hw/gpio/pl061: Convert DPRINTF to tracepoints hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write tests/boot-serial-test: Add STM32VLDISCOVERY board testcase docs/system: arm: Add stm32 boards description stm32vldiscovery: Add the STM32VLDISCOVERY Machine stm32f100: Add the stm32f100 SoC
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
1af060e5 |
| 17-Jun-2021 |
Alexandre Iooss <erdnaxe@crans.org> |
docs/system: arm: Add stm32 boards description
This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY.
Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alist
docs/system: arm: Add stm32 boards description
This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY.
Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-4-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
ecba223d |
| 24-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210624' into staging
target-arm queue: * Don't require 'virt' board to be compiled in for ACPI GHES code * docs: Document whic
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210624' into staging
target-arm queue: * Don't require 'virt' board to be compiled in for ACPI GHES code * docs: Document which architecture extensions we emulate * Fix bugs in M-profile FPCXT_NS accesses * First slice of MVE patches * Implement MTE3 * docs/system: arm: Add nRF boards description
# gpg: Signature made Thu 24 Jun 2021 14:59:16 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210624: (57 commits) docs/system: arm: Add nRF boards description target/arm: Implement MTE3 target/arm: Make VMOV scalar <-> gpreg beatwise for MVE target/arm: Implement MVE VADDV target/arm: Implement MVE VHCADD target/arm: Implement MVE VCADD target/arm: Implement MVE VADC, VSBC target/arm: Implement MVE VRHADD target/arm: Implement MVE VQDMULL (vector) target/arm: Implement MVE VQDMLSDH and VQRDMLSDH target/arm: Implement MVE VQDMLADH and VQRDMLADH target/arm: Implement MVE VRSHL target/arm: Implement MVE VSHL insn target/arm: Implement MVE VQRSHL target/arm: Implement MVE VQSHL (vector) target/arm: Implement MVE VQADD, VQSUB (vector) target/arm: Implement MVE VQDMULH, VQRDMULH (vector) target/arm: Implement MVE VQDMULL scalar target/arm: Implement MVE VQDMULH and VQRDMULH (scalar) target/arm: Implement MVE VQADD and VQSUB ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
90a76c63 |
| 21-Jun-2021 |
Alexandre Iooss <erdnaxe@crans.org> |
docs/system: arm: Add nRF boards description
This adds the target guide for BBC Micro:bit.
Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c.
Signed-off
docs/system: arm: Add nRF boards description
This adds the target guide for BBC Micro:bit.
Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c.
Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20210621075625.540471-1-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
741292fa |
| 17-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
docs/system/arm: Document which architecture extensions we emulate
These days the Arm architecture has a wide range of fine-grained optional extra architectural features. We implement quite a lot of
docs/system/arm: Document which architecture extensions we emulate
These days the Arm architecture has a wide range of fine-grained optional extra architectural features. We implement quite a lot of these but by no means all of them. Document what we do implement, so that users can find out without having to dig through back-issues of our Changelog on the wiki.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210617140328.28622-1-peter.maydell@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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#
7b09f127 |
| 08-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210108' into staging
target-arm queue: * intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs * target/arm: Fix MTE0_ACTIVE
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210108' into staging
target-arm queue: * intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs * target/arm: Fix MTE0_ACTIVE * target/arm: Implement v8.1M and Cortex-M55 model * hw/arm/highbank: Drop dead KVM support code * util/qemu-timer: Make timer_free() imply timer_del() * various devices: Use ptimer_free() in finalize function * docs/system: arm: Add sabrelite board description * sabrelite: Minor fixes to allow booting U-Boot
# gpg: Signature made Fri 08 Jan 2021 15:34:25 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210108: (23 commits) docs/system: arm: Add sabrelite board description hw/arm: sabrelite: Connect the Ethernet PHY at address 6 hw/msic: imx6_ccm: Correct register value for silicon type hw/misc: imx6_ccm: Update PMU_MISC0 reset value exynos4210_mct: Use ptimer_free() in the finalize function to avoid memleaks musicpal: Use ptimer_free() in the finalize function to avoid memleaks mss-timer: Use ptimer_free() in the finalize function to avoid memleaks exynos4210_pwm: Use ptimer_free() in the finalize function to avoid memleaks exynos4210_rtc: Use ptimer_free() in the finalize function to avoid memleaks allwinner-a10-pit: Use ptimer_free() in the finalize function to avoid memleaks digic-timer: Use ptimer_free() in the finalize function to avoid memleaks target/arm: Remove timer_del()/timer_deinit() before timer_free() Remove superfluous timer_del() calls scripts/coccinelle: New script to remove unnecessary timer_del() calls util/qemu-timer: Make timer_free() imply timer_del() hw/arm/highbank: Drop dead KVM support code target/arm: Implement Cortex-M55 model target/arm: Implement FPCXT_NS fp system register target/arm: Correct store of FPSCR value via FPCXT_S hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
c9f8511e |
| 06-Jan-2021 |
Bin Meng <bin.meng@windriver.com> |
docs/system: arm: Add sabrelite board description
This adds the target guide for SABRE Lite board, and documents how to boot a Linux kernel and U-Boot bootloader.
Signed-off-by: Bin Meng <bin.meng@
docs/system: arm: Add sabrelite board description
This adds the target guide for SABRE Lite board, and documents how to boot a Linux kernel and U-Boot bootloader.
Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20210106063504.10841-5-bmeng.cn@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
272fa749 |
| 23-Nov-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201123' into staging
target-arm queue: * incorporate 'orphan' rST docs into manuals * linux-user/arm: Deliver SIGTRAP for UDF
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201123' into staging
target-arm queue: * incorporate 'orphan' rST docs into manuals * linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints * target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 * document raspi boards and tosa * docs/system: Deprecate raspi2/raspi3 machine aliases * docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs * MAINTAINERS: add lines for docs files for Arm boards * hw/intc: fix heap-buffer-overflow in rxicu_realize() * hw/arm: Fix bad print format specifiers * target/arm: fix stage 2 page-walks in 32-bit emulation
# gpg: Signature made Mon 23 Nov 2020 11:42:02 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20201123: (24 commits) docs/system/pr-manager.rst: Fix minor docs nits docs: Split qemu-pr-helper documentation into tools manual docs: Move pr-manager.rst into the system manual docs: Move microvm.rst into the system manual docs: Split out 'pc' machine model docs into their own file docs/system/virtio-pmem.rst: Fix minor style issues docs: Move virtio-pmem.rst into the system manual docs: Move cpu-hotplug.rst into the system manual docs: Move virtio-net-failover.rst into the system manual linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 docs/system/arm: Document the Sharp Zaurus SL-6000 docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs docs/system/arm: Document the various raspi boards docs/system: Deprecate raspi2/raspi3 machine aliases MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine MAINTAINERS: Fix system/arm/orangepi.rst path MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
d9f2ac3d |
| 20-Nov-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
docs/system/arm: Document the various raspi boards
Document the following Raspberry Pi models:
- raspi0 Raspberry Pi Zero (revision 1.2) - raspi1ap Raspberry Pi A+ (revi
docs/system/arm: Document the various raspi boards
Document the following Raspberry Pi models:
- raspi0 Raspberry Pi Zero (revision 1.2) - raspi1ap Raspberry Pi A+ (revision 1.1) - raspi2b Raspberry Pi 2B (revision 1.1) - raspi3ap Raspberry Pi 3A+ (revision 1.0) - raspi3b Raspberry Pi 3B (revision 1.2)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201120173953.2539469-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
3e7d06d0 |
| 10-Nov-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201110' into staging
target-arm queue: * hw/arm/Kconfig: ARM_V7M depends on PTIMER * Minor coding style fixes * docs: add som
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201110' into staging
target-arm queue: * hw/arm/Kconfig: ARM_V7M depends on PTIMER * Minor coding style fixes * docs: add some notes on the sbsa-ref machine * hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals * target/arm: Fix neon VTBL/VTBX for len > 1 * hw/arm/armsse: Correct expansion MPC interrupt lines * hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ * hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() * hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input * hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary * hw/arm/nseries: Check return value from load_image_targphys() * tests/qtest/npcm7xx_rng-test: count runs properly * target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check
# gpg: Signature made Tue 10 Nov 2020 11:17:45 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20201110: target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check tests/qtest/npcm7xx_rng-test: count runs properly hw/arm/nseries: Check return value from load_image_targphys() hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ hw/arm/armsse: Correct expansion MPC interrupt lines target/arm: Fix neon VTBL/VTBX for len > 1 hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals docs: add some notes on the sbsa-ref machine target/arm: add space before the open parenthesis '(' target/arm: Don't use '#' flag of printf format target/arm: add spaces around operator ssi: Fix bad printf format specifiers hw/arm/Kconfig: ARM_V7M depends on PTIMER
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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0339c2a8 |
| 04-Nov-2020 |
Alex Bennée <alex.bennee@linaro.org> |
docs: add some notes on the sbsa-ref machine
We should at least document what this machine is about.
Reviewed-by: Graeme Gregory <graeme@nuviainc.com> Signed-off-by: Alex Bennée <alex.bennee@linaro
docs: add some notes on the sbsa-ref machine
We should at least document what this machine is about.
Reviewed-by: Graeme Gregory <graeme@nuviainc.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20201104165254.24822-1-alex.bennee@linaro.org Cc: Leif Lindholm <leif@nuviainc.com> Cc: Shashi Mallela <shashi.mallela@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [PMM: fixed filename mismatch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2d2c73d0 |
| 14-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging
* hw/misc/a9scu: Do not allow invalid CPU count * hw/misc/a9scu: Minor cleanups * hw/timer/armv7m_syst
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging
* hw/misc/a9scu: Do not allow invalid CPU count * hw/misc/a9scu: Minor cleanups * hw/timer/armv7m_systick: assert that board code set system_clock_scale * decodetree: Improve identifier matching * target/arm: Clean up neon fp insn size field decode * target/arm: Remove KVM support for 32-bit Arm hosts * hw/arm/mps2: New board models mps2-an386, mps2-an500 * Deprecate Unicore32 port * Deprecate lm32 port * target/arm: Count PMU events when MDCR.SPME is set * hw/arm: versal-virt: Correct the tx/rx GEM clocks * New Nuvoton iBMC board models npcm750-evb, quanta-gsj
# gpg: Signature made Mon 14 Sep 2020 16:02:06 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200914-1: (32 commits) tests/acceptance: console boot tests for quanta-gsj docs/system: Add Nuvoton machine documentation hw/arm/npcm7xx: add board setup stub for CPU and UART clocks hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj hw/ssi: NPCM7xx Flash Interface Unit device model hw/mem: Stubbed out NPCM7xx Memory Controller model hw/nvram: NPCM7xx OTP device model hw/arm: Load -bios image as a boot ROM for npcm7xx roms: Add virtual Boot ROM for NPCM7xx SoCs hw/arm: Add two NPCM7xx-based machines hw/arm: Add NPCM730 and NPCM750 SoC models hw/timer: Add NPCM7xx Timer device model hw/misc: Add NPCM7xx Clock Controller device model hw/misc: Add NPCM7xx System Global Control Registers device model hw/arm: versal-virt: Correct the tx/rx GEM clocks target/arm: Count PMU events when MDCR.SPME is set Deprecate lm32 port Deprecate Unicore32 port docs/system/arm/mps2.rst: Make board list consistent hw/arm/mps2: New board model mps2-an500 ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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82c703fe |
| 11-Sep-2020 |
Havard Skinnemoen <hskinnemoen@google.com> |
docs/system: Add Nuvoton machine documentation
Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google
docs/system: Add Nuvoton machine documentation
Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-14-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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07d914cb |
| 24-Aug-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824' into staging
target-arm queue: * hw/cpu/a9mpcore: Verify the machine use Cortex-A9 cores * hw/arm/smmuv3: Implement SM
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824' into staging
target-arm queue: * hw/cpu/a9mpcore: Verify the machine use Cortex-A9 cores * hw/arm/smmuv3: Implement SMMUv3.2 range-invalidation * docs/system/arm: Document the Xilinx Versal Virt board * target/arm: Make M-profile NOCP take precedence over UNDEF * target/arm: Use correct FPST for VCMLA, VCADD on fp16 * target/arm: Various cleanups preparing for fp16 support
# gpg: Signature made Mon 24 Aug 2020 10:47:14 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200824: (27 commits) target/arm: Use correct FPST for VCMLA, VCADD on fp16 target/arm: Implement FPST_STD_F16 fpstatus target/arm: Make A32/T32 use new fpstatus_ptr() API target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr() target/arm: Delete unused ARM_FEATURE_CRC target/arm/translate.c: Delete/amend incorrect comments target/arm: Delete unused VFP_DREG macros target/arm: Remove ARCH macro target/arm: Convert T32 coprocessor insns to decodetree target/arm: Do M-profile NOCP checks early and via decodetree target/arm: Tidy up disas_arm_insn() target/arm: Convert A32 coprocessor insns to decodetree target/arm: Separate decode from handling of coproc insns target/arm: Pull handling of XScale insns out of disas_coproc_insn() docs/system/arm: Document the Xilinx Versal Virt board hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support hw/arm/smmuv3: Fix IIDR offset hw/arm/smmuv3: Get prepared for range invalidation ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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ff9e157b |
| 03-Aug-2020 |
Edgar E. Iglesias <edgar.iglesias@xilinx.com> |
docs/system/arm: Document the Xilinx Versal Virt board
Document the Xilinx Versal Virt board.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200803164749.301971-2-edgar.
docs/system/arm: Document the Xilinx Versal Virt board
Document the Xilinx Versal Virt board.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200803164749.301971-2-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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af3d6905 |
| 20-Jul-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200720' into staging
target-arm queue: * virt: Don't enable MTE emulation by default * virt: Diagnose attempts to use MTE with
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200720' into staging
target-arm queue: * virt: Don't enable MTE emulation by default * virt: Diagnose attempts to use MTE with memory-hotplug or KVM (rather than silently not working correctly) * util: Implement qemu_get_thread_id() for OpenBSD * qdev: Add doc comments for qdev_unrealize and GPIO functions, and standardize on doc-comments-in-header-file * hw/arm/armsse: Assert info->num_cpus is in-bounds in armsse_realize() * docs/system: Document canon-a1100, collie, gumstix, virt boards
# gpg: Signature made Mon 20 Jul 2020 13:55:36 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200720: docs/system: Document the arm virt board docs/system: Briefly document gumstix boards docs/system: Briefly document collie board docs/system: Briefly document canon-a1100 board hw/arm/armsse: Assert info->num_cpus is in-bounds in armsse_realize() qdev: Document GPIO related functions qdev: Document qdev_unrealize() qdev: Move doc comments from qdev.c to qdev-core.h util: Implement qemu_get_thread_id() for OpenBSD hw/arm/virt: Disable memory hotplug when MTE is enabled hw/arm/virt: Error for MTE enabled with KVM hw/arm/virt: Enable MTE via a machine property
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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